[v11,0/8] arm64: j721s2: Add support for additional IPs

The following series of patches add support for the following
on J721S2 common processor board,

- USB
- SerDes
- OSPI
- PCIe

Changes from v10:
* Removed the ti,j721e-system-controller bindings document
  patch introduced in v9
* Updated mux-controller node with "reg" property to fix dtbs
  warnings
* For the nodes which are disabled by default, added comments to
  provide the reason behind it
* Dropped Link tags in all patches

Changes from v9:
* Disabled nodes in main.dtsi and enable them in the board
  specific DT file

Changes from v8:
* Update the ti,j721e-system-controller bindings document
* Fix dtbs warnings

Changes from v7:
* Fix node names as per bindings document

Changes from v6:
* Changes to ti,j721s2-wiz-10g compatible string from ti,am64-wiz-10g but
  requires this series to be merged first
  Ref: https://lore.kernel.org/linux-arm-kernel/20221122092203.762308-1-mranostay@ti.com/
* Removed unused pcie1_ep based on feedback
* Switch from incorrect "ti,j721e-system-controller", "syscon", "simple-mfd" compatible for
  SPI node to "simple-bus"

Changes from v5:
* Removed Cc from commit messages to reduce clutter
* Squashed changes for device tree nodes that get modified latter in the patchset
  series

Changes from v4:
* Add my Signed-off-by lines to all patchsets

Changes from v3:
* Rebased changes on top of '[PATCH 00/12] TI J7x Disable Incomplete DT Nodes'
* Removed "dt-bindings: PCI: Add host mode device-id for j721s2 platform" patch and
  send it own series to avoid a dependency that would hold up other patches in this
  series.

Changes from v2:
* Added PCIe RC + EP enablement patchsets
* Added device-id for j722s2 PCIe host in dt documentation
* Reworked SERDES + WIZ enablement patchset to use properies for clocks
  defines versus entire devicetree nodes. Results in cleaner code that
  doesn't break dt-schema or the driver functionality.

Changes from v1:
* Resolve issues with dt schema reporting
* Minor changes related to consistency on node naming and value

v10: https://lore.kernel.org/all/20230221120612.27366-1-r-gunasekaran@ti.com/
v9: https://lore.kernel.org/all/20230220111408.9476-1-r-gunasekaran@ti.com/
v8: https://lore.kernel.org/all/20230123095733.31657-1-r-gunasekaran@ti.com/
v7: https://lore.kernel.org/all/20221122101616.770050-1-mranostay@ti.com/
v6: https://lore.kernel.org/all/20221119040906.9495-1-mranostay@ti.com/
v5: https://lore.kernel.org/all/20221103044125.172864-1-mranostay@ti.com/
v4: https://lore.kernel.org/all/20221101033204.33048-1-mranostay@ti.com/
v3: https://lore.kernel.org/all/20220921031327.4135-1-mranostay@ti.com/
v2: https://lore.kernel.org/all/20220908011911.3319-1-mranostay@ti.com/
v1: https://lore.kernel.org/all/20220125131113.727-1-a-govindraju@ti.com/

Aswath Govindraju (7):
  arm64: dts: ti: k3-j721s2-main: Add support for USB
  arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI
  arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0
  arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support
  arm64: dts: ti: k3-j721s2: Add support for OSPI Flashes
  arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node
  arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe

Matt Ranostay (1):
  arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node

 .../dts/ti/k3-j721s2-common-proc-board.dts    |  98 ++++++++++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi    | 173 ++++++++++++++++++
 .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi     |  62 +++++++
 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi  |  43 +++++
 4 files changed, 376 insertions(+)