From patchwork Thu Apr 6 20:07:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 671826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D24B5C77B6C for ; Thu, 6 Apr 2023 20:07:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238699AbjDFUHy (ORCPT ); Thu, 6 Apr 2023 16:07:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236697AbjDFUHw (ORCPT ); Thu, 6 Apr 2023 16:07:52 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E5529029 for ; Thu, 6 Apr 2023 13:07:50 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id h17so40638371wrt.8 for ; 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Thu, 06 Apr 2023 13:07:48 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:4793:cb9a:340b:2f72]) by smtp.gmail.com with ESMTPSA id c11-20020adfe74b000000b002d89e113691sm2560506wrn.52.2023.04.06.13.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Apr 2023 13:07:48 -0700 (PDT) From: Bartosz Golaszewski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Will Deacon , Robin Murphy , Joerg Roedel , Catalin Marinas , Arnd Bergmann Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Bartosz Golaszewski Subject: [PATCH v2 0/7] arm64: dts: qcom: sa8775p: add more IOMMUs Date: Thu, 6 Apr 2023 22:07:16 +0200 Message-Id: <20230406200723.552644-1-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bartosz Golaszewski Add the GPU and PCIe IOMMUs for sa8775p platforms as well as the required GPU clock controller driver. v1 -> v2: - remove unused include in the GPUCC driver - remove unused clock from the GPUCC driver and make it compatible with the generic QCom GPUCC bindings - put the new defconfig option in the right place (as per savedefconfig) and make the GPUCC driver a module rather than built-in - describe the smmu clocks for sa8775p in dt-bindings Bartosz Golaszewski (6): dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P arm64: defconfig: enable the SA8775P GPUCC driver dt-bindings: iommu: arm,smmu: enable clocks for sa8775p arm64: dts: qcom: sa8775p: add the pcie smmu node arm64: dts: qcom: sa8775p: add the GPU clock controller node arm64: dts: qcom: sa8775p: add the GPU IOMMU node Shazad Hussain (1): clk: qcom: add the GPUCC driver for sa8775p .../devicetree/bindings/clock/qcom,gpucc.yaml | 2 + .../devicetree/bindings/iommu/arm,smmu.yaml | 5 +- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 124 ++++ arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gpucc-sa8775p.c | 625 ++++++++++++++++++ .../dt-bindings/clock/qcom,sa8775p-gpucc.h | 50 ++ 8 files changed, 814 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/qcom/gpucc-sa8775p.c create mode 100644 include/dt-bindings/clock/qcom,sa8775p-gpucc.h