From patchwork Tue Apr 11 08:30:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 672501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4054C76196 for ; Tue, 11 Apr 2023 08:31:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230303AbjDKIbL (ORCPT ); Tue, 11 Apr 2023 04:31:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230370AbjDKIbK (ORCPT ); Tue, 11 Apr 2023 04:31:10 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7859E7B for ; Tue, 11 Apr 2023 01:31:07 -0700 (PDT) Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1pm9P6-0005Nv-S2; Tue, 11 Apr 2023 10:31:04 +0200 From: Steffen Trumtrar To: linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 00/10] ARM: stm32: add support for Phycore STM32MP1 Date: Tue, 11 Apr 2023 10:30:35 +0200 Message-Id: <20230411083045.2850138-1-s.trumtrar@pengutronix.de> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.trumtrar@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, this is the eighth installement of my series for adding support for the Phytec STM32MP1-based SoM and board. Phytec itself calls the board "Phycore STM32MP1-3" and has other endnumbers. I only have access to the "-3" and that's what this series adds. Changes since v7: - remove unused gpu_reservde memory range - get rid of duplicate ethernet clock assignments - remove secure-status for sdmmc Changes since v6: - rename mdio0->mdio Changes since v5: - add reviewed/acked-by - cleanup dt_bindings_check warnings Changes since v4: - cleanup usage of "status = okay|disabled" - fix remaining non-generic node names - rework sai nodes to not duplicate the existing settings in stm32mp151.dtsi Changes since v3: - cleanup board-compatible - cleanup aliases - rename nodes according to schema - use interrupt flag Steffen Trumtrar (10): ARM: dts: stm32: Add alternate pinmux for ethernet ARM: dts: stm32: Add alternate pinmux for sai2b ARM: dts: stm32: Add new pinmux for sdmmc1_b4 ARM: dts: stm32: Add new pinmux for sdmmc2_d47 ARM: dts: stm32: Add pinmux for USART1 pins ARM: dts: stm32: Add idle/sleep pinmux for USART3 ARM: dts: stm32: Add sleep pinmux for SPI1 pins_a dt-bindings: arm: stm32: Add Phytec STM32MP1 board ARM: dts: stm32: add STM32MP1-based Phytec SoM ARM: dts: stm32: add STM32MP1-based Phytec board .../devicetree/bindings/arm/stm32/stm32.yaml | 6 + arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 231 +++++++ .../dts/stm32mp157c-phycore-stm32mp1-3.dts | 60 ++ .../stm32mp157c-phycore-stm32mp15-som.dtsi | 577 ++++++++++++++++++ 5 files changed, 876 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/stm32mp157c-phycore-stm32mp1-3.dts create mode 100644 arch/arm/boot/dts/stm32mp157c-phycore-stm32mp15-som.dtsi