| Message ID | 20230603200243.243878-1-varshini.rajendran@microchip.com |
|---|---|
| Headers | show |
| Series | Add support for sam9x7 SoC family | expand |
Hey Varshini, On Sun, Jun 04, 2023 at 01:32:25AM +0530, Varshini Rajendran wrote: > Document the property clock-names in the schema. > > It fixes the dtbs_warning, s/dtbs_warning/dtbs_check warning/? > 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' Does this fix a warning currently in the tree, or fix a warning introduced by some patches in this series? (Or both?) Cheers, Conor. > > Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> > --- > Documentation/devicetree/bindings/usb/generic-ehci.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml > index 7e486cc6cfb8..542ac26960fc 100644 > --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml > +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml > @@ -102,6 +102,10 @@ properties: > - if a USB DRD channel: first clock should be host and second > one should be peripheral > > + clock-names: > + minItems: 1 > + maxItems: 4 > + > power-domains: > maxItems: 1 > > -- > 2.25.1 >
On Sun, Jun 04, 2023 at 01:32:36AM +0530, Varshini Rajendran wrote: > Add a driver for the PMC clocks of sam9x7 Soc family > > Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> ... > +static void __init sam9x7_pmc_setup(struct device_node *np) > +{ > + struct clk_range range = CLK_RANGE(0, 0); > + const char *td_slck_name, *md_slck_name, *mainxtal_name; > + struct pmc_data *sam9x7_pmc; > + const char *parent_names[9]; > + void **alloc_mem = NULL; > + int alloc_mem_size = 0; > + struct clk_hw *main_osc_hw; > + struct regmap *regmap; > + struct clk_hw *hw; > + int i, j; > + > + i = of_property_match_string(np, "clock-names", "td_slck"); > + if (i < 0) > + return; > + > + td_slck_name = of_clk_get_parent_name(np, i); > + > + i = of_property_match_string(np, "clock-names", "md_slck"); > + if (i < 0) > + return; > + > + md_slck_name = of_clk_get_parent_name(np, i); > + > + i = of_property_match_string(np, "clock-names", "main_xtal"); > + if (i < 0) > + return; > + mainxtal_name = of_clk_get_parent_name(np, i); > + > + regmap = device_node_to_regmap(np); > + if (IS_ERR(regmap)) > + return; > + > + sam9x7_pmc = pmc_data_allocate(PMC_PLLACK + 1, > + nck(sam9x7_systemck), > + nck(sam9x7_periphck), > + nck(sam9x7_gck), 8); > + if (!sam9x7_pmc) > + return; > + > + alloc_mem = kmalloc(sizeof(void *) * > + (ARRAY_SIZE(sam9x7_gck)), > + GFP_KERNEL); > + if (!alloc_mem) > + goto err_free; > + > + hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000, > + 50000000); > + if (IS_ERR(hw)) > + goto err_free; > + > + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, 0); > + if (IS_ERR(hw)) > + goto err_free; > + main_osc_hw = hw; > + > + parent_names[0] = "main_rc_osc"; > + parent_names[1] = "main_osc"; > + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->chws[PMC_MAIN] = hw; > + > + for (i = 0; i < PLL_ID_MAX; i++) { > + for (j = 0; j < 3; j++) { > + struct clk_hw *parent_hw; > + > + if (!sam9x7_plls[i][j].n) > + continue; > + > + switch (sam9x7_plls[i][j].t) { > + case PLL_TYPE_FRAC: > + if (!strcmp(sam9x7_plls[i][j].p, "mainck")) > + parent_hw = sam9x7_pmc->chws[PMC_MAIN]; > + else if (!strcmp(sam9x7_plls[i][j].p, "main_osc")) > + parent_hw = main_osc_hw; > + else > + parent_hw = __clk_get_hw(of_clk_get_by_name > + (np, sam9x7_plls[i][j].p)); > + > + hw = sam9x60_clk_register_frac_pll(regmap, > + &pmc_pll_lock, > + sam9x7_plls[i][j].n, > + sam9x7_plls[i][j].p, > + parent_hw, i, > + sam9x7_plls[i][j].c, > + sam9x7_plls[i][j].l, > + sam9x7_plls[i][j].f); > + break; > + > + case PLL_TYPE_DIV: > + hw = sam9x60_clk_register_div_pll(regmap, > + &pmc_pll_lock, > + sam9x7_plls[i][j].n, > + sam9x7_plls[i][j].p, i, > + sam9x7_plls[i][j].c, > + sam9x7_plls[i][j].l, > + sam9x7_plls[i][j].f, 0); > + break; > + > + default: > + continue; > + } > + > + if (IS_ERR(hw)) > + goto err_free; > + > + if (sam9x7_plls[i][j].eid) > + sam9x7_pmc->chws[sam9x7_plls[i][j].eid] = hw; > + } > + } > + > + parent_names[0] = md_slck_name; > + parent_names[1] = "mainck"; > + parent_names[2] = "plla_divpmcck"; > + parent_names[3] = "upll_divpmcck"; > + hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, > + parent_names, &sam9x7_master_layout, > + &mck_characteristics, &mck_lock); > + if (IS_ERR(hw)) > + goto err_free; > + > + hw = at91_clk_register_master_div(regmap, "masterck_div", > + "masterck_pres", &sam9x7_master_layout, > + &mck_characteristics, &mck_lock, > + CLK_SET_RATE_GATE, 0); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->chws[PMC_MCK] = hw; > + > + parent_names[0] = "plla_divpmcck"; > + parent_names[1] = "upll_divpmcck"; > + parent_names[2] = "main_osc"; > + hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3); > + if (IS_ERR(hw)) > + goto err_free; > + > + parent_names[0] = md_slck_name; > + parent_names[1] = td_slck_name; > + parent_names[2] = "mainck"; > + parent_names[3] = "masterck_div"; > + parent_names[4] = "plla_divpmcck"; > + parent_names[5] = "upll_divpmcck"; > + parent_names[6] = "audiopll_divpmcck"; > + for (i = 0; i < 2; i++) { > + char name[6]; > + > + snprintf(name, sizeof(name), "prog%d", i); > + > + hw = at91_clk_register_programmable(regmap, name, > + parent_names, 7, i, > + &sam9x7_programmable_layout, > + NULL); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->pchws[i] = hw; > + } > + > + for (i = 0; i < ARRAY_SIZE(sam9x7_systemck); i++) { > + hw = at91_clk_register_system(regmap, sam9x7_systemck[i].n, > + sam9x7_systemck[i].p, > + sam9x7_systemck[i].id, > + sam9x7_systemck[i].flags); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->shws[sam9x7_systemck[i].id] = hw; > + } > + > + for (i = 0; i < ARRAY_SIZE(sam9x7_periphck); i++) { > + hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, > + &sam9x7_pcr_layout, > + sam9x7_periphck[i].n, > + "masterck_div", > + sam9x7_periphck[i].id, > + &range, INT_MIN, > + sam9x7_periphck[i].f); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->phws[sam9x7_periphck[i].id] = hw; > + } > + > + parent_names[0] = md_slck_name; > + parent_names[1] = td_slck_name; > + parent_names[2] = "mainck"; > + parent_names[3] = "masterck_div"; > + for (i = 0; i < ARRAY_SIZE(sam9x7_gck); i++) { > + u8 num_parents = 4 + sam9x7_gck[i].pp_count; > + u32 *mux_table; > + > + mux_table = kmalloc_array(num_parents, sizeof(*mux_table), > + GFP_KERNEL); > + if (!mux_table) > + goto err_free; > + > + SAM9X7_INIT_TABLE(mux_table, 4); > + SAM9X7_FILL_TABLE(&mux_table[4], sam9x7_gck[i].pp_mux_table, > + sam9x7_gck[i].pp_count); > + SAM9X7_FILL_TABLE(&parent_names[4], sam9x7_gck[i].pp, > + sam9x7_gck[i].pp_count); > + > + hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, > + &sam9x7_pcr_layout, > + sam9x7_gck[i].n, > + parent_names, mux_table, > + num_parents, > + sam9x7_gck[i].id, > + &sam9x7_gck[i].r, > + sam9x7_gck[i].pp_chg_id); > + if (IS_ERR(hw)) > + goto err_free; > + > + sam9x7_pmc->ghws[sam9x7_gck[i].id] = hw; > + alloc_mem[alloc_mem_size++] = mux_table; > + } > + > + of_clk_add_hw_provider(np, of_clk_hw_pmc_get, sam9x7_pmc); > + Hi Varshini, alloc_mem appears to be leaked here. > + return; > + > +err_free: > + if (alloc_mem) { > + for (i = 0; i < alloc_mem_size; i++) > + kfree(alloc_mem[i]); > + kfree(alloc_mem); > + } > + kfree(sam9x7_pmc); > +} > + > +/* Some clks are used for a clocksource */ > +CLK_OF_DECLARE(sam9x7_pmc, "microchip,sam9x7-pmc", sam9x7_pmc_setup); I'm sure I'm missing some thing obvious, but I was unable to find the binding for "microchip,sam9x7-pmc".
This patch series adds support for the new SoC family - sam9x7. - The device tree, configs and drivers are added - Clock driver for sam9x7 is added - Support for basic peripherals is added Balamanikandan Gunasundar (1): ARM: configs: at91: Enable csi and isc support Hari Prasath (1): irqchip/atmel-aic5: Add support for sam9x7 aic Nicolas Ferre (1): net: macb: add support for gmac to sam9x7 Varshini Rajendran (18): dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x60 compatible dt-bindings: usb: ehci: Add atmel at91sam9g45-ehci compatible dt-bindings: usb: generic-ehci: Document clock-names property ARM: dts: at91: sam9x7: add device tree for soc ARM: configs: at91: enable config flags for sam9x7 SoC ARM: configs: at91: add mcan support ARM: at91: pm: add support for sam9x7 soc family ARM: at91: pm: add sam9x7 soc init config ARM: at91: Kconfig: add config flag for SAM9X7 SoC ARM: at91: add support in soc driver for new sam9x7 clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputs clk: at91: sam9x7: add support for HW PLL freq dividers clk: at91: sam9x7: add sam9x7 pmc driver dt-bindings: irqchip/atmel-aic5: Add support for sam9x7 aic power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7 power: reset: at91-reset: add reset support for sam9x7 soc power: reset: at91-reset: add sdhwc support for sam9x7 soc dt-bindings: net: cdns,macb: add documentation for sam9x7 ethernet interface .../interrupt-controller/atmel,aic.txt | 2 +- .../devicetree/bindings/net/cdns,macb.yaml | 1 + .../soc/microchip/atmel,at91rm9200-tcb.yaml | 1 + .../devicetree/bindings/usb/generic-ehci.yaml | 5 + arch/arm/boot/dts/sam9x7.dtsi | 1333 +++++++++++++++++ arch/arm/configs/at91_dt_defconfig | 8 + arch/arm/mach-at91/Kconfig | 21 +- arch/arm/mach-at91/Makefile | 1 + arch/arm/mach-at91/generic.h | 2 + arch/arm/mach-at91/pm.c | 35 + arch/arm/mach-at91/sam9x7.c | 34 + drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-sam9x60-pll.c | 50 +- drivers/clk/at91/pmc.h | 2 + drivers/clk/at91/sam9x60.c | 7 + drivers/clk/at91/sam9x7.c | 947 ++++++++++++ drivers/clk/at91/sama7g5.c | 7 + drivers/irqchip/irq-atmel-aic5.c | 10 + drivers/net/ethernet/cadence/macb_main.c | 1 + drivers/power/reset/Kconfig | 4 +- drivers/power/reset/at91-sama5d2_shdwc.c | 1 + drivers/soc/atmel/soc.c | 23 + drivers/soc/atmel/soc.h | 9 + 23 files changed, 2489 insertions(+), 16 deletions(-) create mode 100644 arch/arm/boot/dts/sam9x7.dtsi create mode 100644 arch/arm/mach-at91/sam9x7.c create mode 100644 drivers/clk/at91/sam9x7.c