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[0/7] MSM8976 PLL,RPMPD and DTS changes.

Message ID 20230723140712.9438-1-a39.skl@gmail.com
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Series MSM8976 PLL,RPMPD and DTS changes. | expand

Message

Adam Skladowski July 23, 2023, 2:06 p.m. UTC 
This patch series fixes introduce support for msm8976 pll,
also brings some adjustments and fixes domains setup and few dts nitpicks.

Adam Skladowski (7):
  drivers: soc: qcom: rpmpd: Fix MSM8976 power domains setup
  clk: qcom: clk-hfpll: Configure l_val in init when required
  clk: qcom: hfpll: Allow matching pdata
  dt-bindings: clock: qcom,hfpll: Document MSM8976 compatibles
  clk: qcom: hfpll: Add MSM8976 PLL data
  arm64: dts: qcom: msm8976: Split lpass region
  arm64: dts: qcom: msm8976: Fix smsm ipc bit shifts

 .../devicetree/bindings/clock/qcom,hfpll.txt  |  3 +
 arch/arm64/boot/dts/qcom/msm8976.dtsi         | 11 +++-
 drivers/clk/qcom/clk-hfpll.c                  |  4 ++
 drivers/clk/qcom/clk-hfpll.h                  |  1 +
 drivers/clk/qcom/hfpll.c                      | 59 ++++++++++++++++++-
 drivers/soc/qcom/rpmpd.c                      | 25 +++-----
 6 files changed, 82 insertions(+), 21 deletions(-)

Comments

AngeloGioacchino Del Regno July 24, 2023, 8:54 a.m. UTC | #1 
Il 23/07/23 16:06, Adam Skladowski ha scritto:
> Some devices like Sony Loire uses Broadcom module over sdc3 however others
> utilize qcom WCNSS, split shared region based on downstream pil-tz loader.
> 
> Signed-off-by: Adam Skladowski <a39.skl@gmail.com>

That should go in board specific files, not in the SoC dtsi.

Regards,
Angelo