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[80.115.237.132]) by smtp.gmail.com with ESMTPSA id i15-20020a1709064ecf00b009a2202bfce5sm6957130ejv.118.2023.08.30.02.58.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 02:58:41 -0700 (PDT) From: Luca Weiss Subject: [PATCH 00/11] Initial support for the Fairphone 5 smartphone Date: Wed, 30 Aug 2023 11:58:25 +0200 Message-Id: <20230830-fp5-initial-v1-0-5a954519bbad@fairphone.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAMES72QC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDI2MDC0ML3bQCU93MvMySzMQc3SSzZAsjQ4OkRMtkCyWgjoKi1LTMCrBp0bG 1tQCNAZuXXQAAAA== To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support to boot up mainline kernel on the QCM6490-based Fairphone 5 smartphone. These patches only cover a part of the functionality brought up on mainline so far, with the rest needing larger dts and driver changes or depend on patches that are not yet merged. I will work on sending those once these base patches here have settled. Since QCM6490, like SC7280 are 'yupik' in the vendor-provided kernel, we can base the dts on it and leverage existing support. Though current sc7280 support mostly assumes ChromeOS devices which have a different TrustZone setup, so we need to move some ChromeOS-specific bits to the sc7280-chrome-common.dtsi file to make it boot on a standard TZ board. Depends on (just for the #include in sc7280.dtsi): https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/ The pm7250b patch has been picked up from this series: https://lore.kernel.org/linux-arm-msm/20230407-pm7250b-sid-v1-2-fc648478cc25@fairphone.com/ Signed-off-by: Luca Weiss --- Luca Weiss (11): arm64: dts: qcom: sc7280: Mark some nodes as 'reserved' nvmem: qfprom: Mark core clk as optional arm64: dts: qcom: sc7280: Move qfprom clock to chrome-common arm64: dts: qcom: pm7250b: make SID configurable arm64: dts: qcom: pm8350c: Add flash led node dt-bindings: pinctrl: qcom,sc7280: Allow gpio-reserved-ranges dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490 soc: qcom: socinfo: Add SoC ID for QCM6490 cpufreq: Add QCM6490 to cpufreq-dt-platdev blocklist dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5 Documentation/devicetree/bindings/arm/qcom.yaml | 6 + .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/pm7250b.dtsi | 23 +- arch/arm64/boot/dts/qcom/pm8350c.dtsi | 6 + arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 659 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 17 + arch/arm64/boot/dts/qcom/sc7280.dtsi | 7 +- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/nvmem/qfprom.c | 2 +- drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 12 files changed, 717 insertions(+), 11 deletions(-) --- base-commit: 0255bba921438ea1e45d3f0873c3e8c5a1e03876 change-id: 20230818-fp5-initial-b6c8210ba9c8 Best regards,