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Date: Tue, 3 Oct 2023 23:04:50 +0530 Message-ID: <20231003173453.938190-1-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EA:EE_|IA1PR12MB8263:EE_ X-MS-Office365-Filtering-Correlation-Id: 121cec71-85fa-4b0e-b5ff-08dbc4373ad4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5B87PR4HRvdr5UEaUg6kH8d0oC2qAlqlAT5aqQJqw+4Q3+OwGwL6qMlXghx8bFCFq2XWhcxLYEN6ySfmblS2zedIMI6NmTjo9NvAzXCxmcDlbj1LEBhnD8DyPf5ptwnAjJOuYJSJvHJUdeHMRcvopJGAXd+vRPgOqNBs/+Kc2MCbeuFpsfuklFa9QfFbWRX6qMd1B1frV5ioZOf4SMsNfMgprNiKIwk6TzxwMF4v+9uLhgBjhItE+mwPbSS8rBRND4qan2q7/2EJslMyWe/jRnF0rlBcc2E1wVaWu7aeesxUl79I650tJe/3P+i3DykQz30UkCiMZ6b9vJ0ShWKpFCW8F+/y0/1SGcD+4YF068vr02LzCsaPBfOApuXFhdnc1EYBCTc9Mf3uEa+Uqk+gVv/EFXY61J6RHiT//VKO2ERQJYZE0asOa3BInnqAVOHokhF++xP4QggQKSiV+XhmeJjvs3FHeRIg1cZRnPOSH/KK3y2I/7vavmzqdpzxMhvKGEpXb4swRdwi0/QljIhIhDwQ+gWT9T4Gbu/fb21jmPhKCNe1HafiQPhoc8B1KozO3dPLj5y5Ie/qL/RLEgfWvN/LbM/NeU+qJ5qh8vQ/blQTsVJDtDjdKD+3U4Zmt8mNnGBcQQnAcEpAEcokMG6p2Y0N4qMin57gKPcMtYxGaKyertCmBVSGU/UIzCt2J4rrS7RGsnimv9K1R3RA7tcAaRpjKxmKA+Z+QOdG3WCew+002VobTXu7QRgnusV9xRQCns5U4uMPYP9XSJURcdyHVlHyjqU4k+KC7I5r2Qke+cU= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(39860400002)(346002)(376002)(396003)(136003)(230922051799003)(82310400011)(186009)(451199024)(64100799003)(1800799009)(46966006)(36840700001)(40470700004)(40460700003)(36860700001)(7416002)(110136005)(54906003)(8676002)(6666004)(8936002)(47076005)(70206006)(4326008)(81166007)(26005)(478600001)(83380400001)(82740400003)(2616005)(426003)(336012)(5660300002)(44832011)(41300700001)(356005)(1076003)(86362001)(70586007)(316002)(2906002)(40480700001)(36756003)(36900700001)(2101003); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2023 17:36:09.0758 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 121cec71-85fa-4b0e-b5ff-08dbc4373ad4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8263 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net This series of patch add support for Xilinx XDMA Soft IP as Root Port. The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's. As Root Port it supports MSI and legacy interrupts. For code reusability existing CPM4 error interrupt bits are moved to common header. Signed-off-by: Thippeswamy Havalige Signed-off-by: Bharat Kumar Gogada --- Thippeswamy Havalige (3): PCI: xilinx-cpm: Move interrupt bit definitions to common header dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe Root Port Bridge PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver .../bindings/pci/xlnx,xdma-host.yaml | 114 +++ drivers/pci/controller/Kconfig | 11 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-xilinx-common.h | 31 + drivers/pci/controller/pcie-xilinx-cpm.c | 38 +- drivers/pci/controller/pcie-xilinx-dma-pl.c | 803 ++++++++++++++++++ 6 files changed, 967 insertions(+), 31 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml create mode 100644 drivers/pci/controller/pcie-xilinx-common.h create mode 100644 drivers/pci/controller/pcie-xilinx-dma-pl.c