From patchwork Fri May 15 16:22:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Prakash Ranjan X-Patchwork-Id: 200466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3B0BC433E2 for ; Fri, 15 May 2020 16:23:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B41762076A for ; Fri, 15 May 2020 16:23:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="KrGrI4Yt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726237AbgEOQXJ (ORCPT ); Fri, 15 May 2020 12:23:09 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:54550 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726191AbgEOQXH (ORCPT ); Fri, 15 May 2020 12:23:07 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589559786; h=Content-Transfer-Encoding: MIME-Version: Message-Id: Date: Subject: Cc: To: From: Sender; bh=jr+Pq8PUO8hvm/NpQeG3PNW0H4SGlfkDWJS5UbVcagI=; b=KrGrI4YtU4GrXPZXiiIluLXS8JwEdnvBClWQ0AwE0F7ra+8m1MvN8CEv1IPi0gAjVYri+x80 CA9ENe3Utzn9OehM2oDiXaEWpzyoHhBjKR3d9zldxpV57hKUXdx5AiHmvX9OMy5dI+Jrglbo SrK8DrNXVXYaIruG5q9oueHqrOQ= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ebec1d8.7fb2f0ea4dc0-smtp-out-n04; Fri, 15 May 2020 16:22:48 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 5D260C4478C; Fri, 15 May 2020 16:22:48 +0000 (UTC) Received: from blr-ubuntu-311.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 13E12C433F2; Fri, 15 May 2020 16:22:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 13E12C433F2 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Mathieu Poirier , Suzuki K Poulose , Mike Leach , devicetree@vger.kernel.org, Rob Herring Cc: Stephen Boyd , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Tingwei Zhang , coresight@lists.linaro.org, Sai Prakash Ranjan Subject: [PATCHv3 0/2] coresight: etm4x: Add support to skip trace unit power up Date: Fri, 15 May 2020 21:52:31 +0530 Message-Id: X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series adds support to skip powering up of trace unit on systems with an errata which stops CPU watchdog counter when power up bit is set (TRCPDCR.PU = 1). Setting this bit is not required on Qualcomm Technologies Inc. chipsets where this errata exists since the ETMs are in the same power domain as their respective CPU cores. Changes since v2: * Fix checkpatch warning for 80 characters. Changes since v1: * Use qcom,skip-power-up for naming as suggested by Mathieu. * Have check for DT property in initialization as per Mathieu. * Reword description for property as per Mathieu. * Split up dt-binding patch as checkpatch complains. Tingwei Zhang (2): coresight: etm4x: Add support to skip trace unit power up dt-bindings: arm: coresight: Add support to skip trace unit power up .../devicetree/bindings/arm/coresight.txt | 7 +++++ drivers/hwtracing/coresight/coresight-etm4x.c | 27 ++++++++++++------- drivers/hwtracing/coresight/coresight-etm4x.h | 3 +++ 3 files changed, 27 insertions(+), 10 deletions(-)