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[00/12] arm64: dts: zynqmp: DT updates to match latest drivers

Message ID cover.1606917949.git.michal.simek@xilinx.com
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Series arm64: dts: zynqmp: DT updates to match latest drivers | expand

Message

Michal Simek Dec. 2, 2020, 2:05 p.m. UTC
Hi,

I am sending this series to reflect the latest drivers which have been
merged to mainline kernel. I have boot it on zcu102-rev1.0 and also
zcu104-rev1.0. That's why I have also added DT for this newer revision.

The series is based on https://github.com/Xilinx/linux-xlnx/tree/zynqmp/dt.
And mio-bank patch requires update in dt-binding which has been posted here
https://lore.kernel.org/r/5fa17dfe4b42abefd84b4cbb7b8bcd4d31398f40.1606914986.git.michal.simek@xilinx.com

Thanks,
Michal


Michal Simek (12):
  arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
  arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
  arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
  arm64: dts: zynqmp: Enable and wire reset controller
  arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
  arm64: dts: zynqmp: Add label for zynqmp_ipi
  arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis
  arm64: dts: zynqmp: Wire arasan nand controller
  arm64: dts: zynqmp: Wire zynqmp qspi controller
  arm64: dts: zynqmp: Add missing lpd watchdog node
  arm64: dts: zynqmp: Add missing iommu IDs
  arm64: dts: zynqmp: Add description for zcu104 revC

 arch/arm64/boot/dts/xilinx/Makefile           |   1 +
 .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi |  12 +
 .../boot/dts/xilinx/zynqmp-zcu100-revC.dts    |   2 +
 .../boot/dts/xilinx/zynqmp-zcu102-revA.dts    |  84 +++++-
 .../boot/dts/xilinx/zynqmp-zcu104-revA.dts    |  29 ++
 .../boot/dts/xilinx/zynqmp-zcu104-revC.dts    | 282 ++++++++++++++++++
 .../boot/dts/xilinx/zynqmp-zcu106-revA.dts    |  78 +++++
 .../boot/dts/xilinx/zynqmp-zcu111-revA.dts    |  59 +++-
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi        | 118 +++++++-
 9 files changed, 661 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts

Comments

Laurent Pinchart Dec. 6, 2020, 10:38 p.m. UTC | #1
Hi Michal,

Thank you for the patch.

On Wed, Dec 02, 2020 at 03:06:03PM +0100, Michal Simek wrote:
> Enable reset controller for several IPs.

> 

> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

> ---

> 

>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 ++++++++++++++++++++++++++

>  1 file changed, 29 insertions(+)

> 

> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

> index 68923fbd0e89..4fa820f78d76 100644

> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

> @@ -187,6 +187,11 @@ zynqmp_pcap: pcap {

>  			xlnx_aes: zynqmp-aes {

>  				compatible = "xlnx,zynqmp-aes";

>  			};

> +

> +			zynqmp_reset: reset-controller {

> +				compatible = "xlnx,zynqmp-reset";

> +				#reset-cells = <1>;

> +			};

>  		};

>  	};

>  

> @@ -466,6 +471,8 @@ gem0: ethernet@ff0b0000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_ETH_0>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;

> +			reset-names = "gem0_rst";


I don't see any of the reset-names used in this patch defined in DT
bindings (or used in drivers). For all devices but the USB controllers
it seems they can be dropped. For the USB controllers, the bindings need
to be updated first.

>  		};

>  

>  		gem1: ethernet@ff0c0000 {

> @@ -478,6 +485,8 @@ gem1: ethernet@ff0c0000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_ETH_1>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;

> +			reset-names = "gem1_rst";

>  		};

>  

>  		gem2: ethernet@ff0d0000 {

> @@ -490,6 +499,8 @@ gem2: ethernet@ff0d0000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_ETH_2>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;

> +			reset-names = "gem2_rst";

>  		};

>  

>  		gem3: ethernet@ff0e0000 {

> @@ -502,6 +513,8 @@ gem3: ethernet@ff0e0000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_ETH_3>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;

> +			reset-names = "gem3_rst";

>  		};

>  

>  		gpio: gpio@ff0a0000 {

> @@ -515,6 +528,8 @@ gpio: gpio@ff0a0000 {

>  			#interrupt-cells = <2>;

>  			reg = <0x0 0xff0a0000 0x0 0x1000>;

>  			power-domains = <&zynqmp_firmware PD_GPIO>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_GPIO>;

> +			reset-names = "gpio_rst";

>  		};

>  

>  		i2c0: i2c@ff020000 {

> @@ -526,6 +541,8 @@ i2c0: i2c@ff020000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_I2C_0>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_I2C0>;

> +			reset-names = "i2c0_rst";

>  		};

>  

>  		i2c1: i2c@ff030000 {

> @@ -537,6 +554,8 @@ i2c1: i2c@ff030000 {

>  			#address-cells = <1>;

>  			#size-cells = <0>;

>  			power-domains = <&zynqmp_firmware PD_I2C_1>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_I2C1>;

> +			reset-names = "i2c1_rst";

>  		};

>  

>  		pcie: pcie@fd0e0000 {

> @@ -602,6 +621,8 @@ sata: ahci@fd0c0000 {

>  			interrupt-parent = <&gic>;

>  			interrupts = <0 133 4>;

>  			power-domains = <&zynqmp_firmware PD_SATA>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;

> +			reset-names = "sata_rst";

>  		};

>  

>  		sdhci0: mmc@ff160000 {

> @@ -733,6 +754,10 @@ usb0: usb@fe200000 {

>  			reg = <0x0 0xfe200000 0x0 0x40000>;

>  			clock-names = "clk_xin", "clk_ahb";

>  			power-domains = <&zynqmp_firmware PD_USB_0>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,

> +				 <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,

> +				 <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;

> +			reset-names = "usb0_crst", "usb0_hibrst", "usb0_apbrst";

>  		};

>  

>  		usb1: usb@fe300000 {

> @@ -743,6 +768,10 @@ usb1: usb@fe300000 {

>  			reg = <0x0 0xfe300000 0x0 0x40000>;

>  			clock-names = "clk_xin", "clk_ahb";

>  			power-domains = <&zynqmp_firmware PD_USB_1>;

> +			resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,

> +				 <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,

> +				 <&zynqmp_reset ZYNQMP_RESET_USB1_APB>;

> +			reset-names = "usb1_crst", "usb1_hibrst", "usb1_apbrst";

>  		};

>  

>  		watchdog0: watchdog@fd4d0000 {


-- 
Regards,

Laurent Pinchart
Michal Simek Dec. 7, 2020, 9:32 a.m. UTC | #2
On 06. 12. 20 23:38, Laurent Pinchart wrote:
> Hi Michal,

> 

> Thank you for the patch.

> 

> On Wed, Dec 02, 2020 at 03:06:03PM +0100, Michal Simek wrote:

>> Enable reset controller for several IPs.

>>

>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

>> ---

>>

>>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 ++++++++++++++++++++++++++

>>  1 file changed, 29 insertions(+)

>>

>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>> index 68923fbd0e89..4fa820f78d76 100644

>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>> @@ -187,6 +187,11 @@ zynqmp_pcap: pcap {

>>  			xlnx_aes: zynqmp-aes {

>>  				compatible = "xlnx,zynqmp-aes";

>>  			};

>> +

>> +			zynqmp_reset: reset-controller {

>> +				compatible = "xlnx,zynqmp-reset";

>> +				#reset-cells = <1>;

>> +			};

>>  		};

>>  	};

>>  

>> @@ -466,6 +471,8 @@ gem0: ethernet@ff0b0000 {

>>  			#address-cells = <1>;

>>  			#size-cells = <0>;

>>  			power-domains = <&zynqmp_firmware PD_ETH_0>;

>> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;

>> +			reset-names = "gem0_rst";

> 

> I don't see any of the reset-names used in this patch defined in DT

> bindings (or used in drivers). For all devices but the USB controllers

> it seems they can be dropped. For the USB controllers, the bindings need

> to be updated first.


Let me double check it. IIRC if there is just one there is likely no
need to list the name but if there are more then one names should be
also there. But you are right it should be the part of dt binding.

Thanks,
Michal
Michal Simek Jan. 21, 2021, 10:10 a.m. UTC | #3
Hi,

On 12/7/20 10:32 AM, Michal Simek wrote:
> 

> 

> On 06. 12. 20 23:38, Laurent Pinchart wrote:

>> Hi Michal,

>>

>> Thank you for the patch.

>>

>> On Wed, Dec 02, 2020 at 03:06:03PM +0100, Michal Simek wrote:

>>> Enable reset controller for several IPs.

>>>

>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

>>> ---

>>>

>>>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 ++++++++++++++++++++++++++

>>>  1 file changed, 29 insertions(+)

>>>

>>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>>> index 68923fbd0e89..4fa820f78d76 100644

>>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

>>> @@ -187,6 +187,11 @@ zynqmp_pcap: pcap {

>>>  			xlnx_aes: zynqmp-aes {

>>>  				compatible = "xlnx,zynqmp-aes";

>>>  			};

>>> +

>>> +			zynqmp_reset: reset-controller {

>>> +				compatible = "xlnx,zynqmp-reset";

>>> +				#reset-cells = <1>;

>>> +			};

>>>  		};

>>>  	};

>>>  

>>> @@ -466,6 +471,8 @@ gem0: ethernet@ff0b0000 {

>>>  			#address-cells = <1>;

>>>  			#size-cells = <0>;

>>>  			power-domains = <&zynqmp_firmware PD_ETH_0>;

>>> +			resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;

>>> +			reset-names = "gem0_rst";

>>

>> I don't see any of the reset-names used in this patch defined in DT

>> bindings (or used in drivers). For all devices but the USB controllers

>> it seems they can be dropped. For the USB controllers, the bindings need

>> to be updated first.

> 

> Let me double check it. IIRC if there is just one there is likely no

> need to list the name but if there are more then one names should be

> also there. But you are right it should be the part of dt binding.


I will skip this patch.

Thanks,
Michal