Show patches with: Submitter = Robert Hancock       |    State = Action Required       |    Archived = No       |   12 patches
Patch Series S/W/F Date Submitter Delegate State
[v8,3/3] usb: dwc3: xilinx: Add ULPI PHY reset handling Xilinx ZynqMP USB fixes --- 2022-01-26 Robert Hancock New
[v7,4/4] usb: dwc3: xilinx: Add ULPI PHY reset handling Xilinx ZynqMP USB fixes --- 2022-01-26 Robert Hancock New
[net-next,v2,2/2] net: dsa: microchip: Add property to disable reference clock Allow disabling KSZ switch refclock --- 2022-01-25 Robert Hancock New
[net-next,v2,2/3] net: macb: Added ZynqMP-specific initialization Cadence MACB/GEM support for ZynqMP SGMII --- 2022-01-25 Robert Hancock New
[net-next,v2,1/3] dt-bindings: net: cdns,macb: added generic PHY and reset mappings for ZynqMP Cadence MACB/GEM support for ZynqMP SGMII --- 2022-01-25 Robert Hancock New
[v4,5/5] arm64: dts: zynqmp: Add DWC3 USB reference clock period configuration Xilinx ZynqMP USB fixes --- 2022-01-14 Robert Hancock New
[v4,4/5] usb: dwc3: add reference clock FLADJ configuration Xilinx ZynqMP USB fixes --- 2022-01-14 Robert Hancock New
[v4,3/5] dt-bindings: usb: dwc3: add reference clock period fractional adjustment Xilinx ZynqMP USB fixes --- 2022-01-14 Robert Hancock New
[v4,1/5] usb: dwc3: xilinx: Fix PIPE clock selection for USB2.0 mode Xilinx ZynqMP USB fixes --- 2022-01-14 Robert Hancock New
[9/9] clk: si5341: Add sysfs properties to allow checking/resetting device faults Si5341 driver updates --- 2021-03-11 Robert Hancock New
[6/9] clk: si5341: Allow different output VDD_SEL values Si5341 driver updates --- 2021-03-11 Robert Hancock New
[4/9] clk: si5341: Check for input clock presence and PLL lock on startup Si5341 driver updates --- 2021-03-11 Robert Hancock New