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[209.132.180.67]) by mx.google.com with ESMTP id v2si1998175pdv.44.2014.10.23.08.54.59 for ; Thu, 23 Oct 2014 08:55:00 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756000AbaJWPyz (ORCPT + 28 others); Thu, 23 Oct 2014 11:54:55 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:50104 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755863AbaJWPyg (ORCPT ); Thu, 23 Oct 2014 11:54:36 -0400 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1977711665; Thu, 23 Oct 2014 23:54:31 +0800 Received: from mtksdtcf02.mediatek.inc (10.21.12.142) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Thu, 23 Oct 2014 23:54:12 +0800 From: Yingjoe Chen To: Rob Herring , Jiang Liu , Marc Zyngier , Matthias Brugger , CC: Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Thomas Gleixner , Jason Cooper , Benjamin Herrenschmidt , Yingjoe Chen , Grant Likely , Hans de Goede , Boris BREZILLON , , , , Olof Johansson , Arnd Bergmann , , , , , , Subject: [PATCH v4 7/7] dt-bindings: add bindings for mediatek sysirq Date: Thu, 23 Oct 2014 23:53:15 +0800 Message-ID: <1414079595-26129-8-git-send-email-yingjoe.chen@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1414079595-26129-1-git-send-email-yingjoe.chen@mediatek.com> References: <1414079595-26129-1-git-send-email-yingjoe.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: yingjoe.chen@mediatek.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add binding documentation for Mediatek SoC SYSIRQ. Signed-off-by: Yingjoe Chen --- .../bindings/arm/mediatek/mediatek,sysirq.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt new file mode 100644 index 0000000..8669536 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt @@ -0,0 +1,26 @@ +Mediatek 65xx/81xx sysirq + +Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI +interrupt. + +Required properties: +- compatible: should be one of: + "mediatek,mt8135-sysirq" + "mediatek,mt8127-sysirq" + "mediatek,mt6589-sysirq" + "mediatek,mt6582-sysirq" + "mediatek,mt6577-sysirq" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Must use the same cells/format as parent controller. +- interrupt-parent: phandle of irq domain parent for sysirq. +- reg: Physical base address of the intpol registers and length of memory + mapped region. + +Example: + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200100 0 0x1c>; + };