From patchwork Thu Mar 31 09:10:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 64743 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp38004lbc; Thu, 31 Mar 2016 02:11:15 -0700 (PDT) X-Received: by 10.98.13.216 with SMTP id 85mr20090265pfn.143.1459415472809; Thu, 31 Mar 2016 02:11:12 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e72si12868106pfb.126.2016.03.31.02.11.12; Thu, 31 Mar 2016 02:11:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756438AbcCaJLK (ORCPT + 7 others); Thu, 31 Mar 2016 05:11:10 -0400 Received: from mail-lf0-f49.google.com ([209.85.215.49]:34593 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754281AbcCaJLH (ORCPT ); Thu, 31 Mar 2016 05:11:07 -0400 Received: by mail-lf0-f49.google.com with SMTP id c62so54885658lfc.1 for ; Thu, 31 Mar 2016 02:11:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=bNvn6WpY1nLADeBwpfBSUNyeLgv0lGSkpEeQ3tqs4kQ=; b=VoxOHFgRxLKkBOivEt1QXSIBU7dsrkhrAU2qte3/eXAqupjOq1YfgVbeSalUNa8di+ bLMRrkMYlLzm5YCS3H0Mb3Lrj5B9a22GUHANkNBgEzkFfjBacP267Asqgm1R9UibyqQW 3ChJlZ47Jh16hZKh1QN4r9odURNNm2/fOfSOI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=bNvn6WpY1nLADeBwpfBSUNyeLgv0lGSkpEeQ3tqs4kQ=; b=kKHX5d3KnsV757rJcpWcNFRtyIrxXrvUhq8VUvQFeJjz70VUg/tN5EsBjUie51TVt1 D9iylT8W3NUrFnhJQNKwllIDMLm+IVw2kprmmCuQcYI1lhxJ11QSqZbrG5F7vKJrO6Bz I4IlOBNw4UUvjaMHsT13K480JfTzh3Je8CgMAkFhIviJIlZUr7JRN1V/CmDVcC7KFIv1 ibupa+KtOrQTRsmESV0etAy0gBAYX/bv08r7WRlzOv41MjOGvzzhNJQToCmh8YHi2uRS UIuLRUUezgdZfhl6eVHh55vzqzZXi0HgEABfisTVPQTjGRi19hn2shUW+1X+0gyPceQ/ cGEQ== X-Gm-Message-State: AD7BkJKeXMycCL/l1xPTA4jF8P5Eic+vbj7ccMdbeSJiypvRSZ1CXF3nIeEXRMkQ8Il/lvWx X-Received: by 10.25.149.145 with SMTP id x139mr5313288lfd.141.1459415465494; Thu, 31 Mar 2016 02:11:05 -0700 (PDT) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k137sm1213984lfg.16.2016.03.31.02.11.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 31 Mar 2016 02:11:04 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org, Alexandre Courbot Cc: Linus Walleij , devicetree@vger.kernel.org, Neil Armstrong , Rob Herring Subject: [PATCH] gpio: dt-bindings: document the concept of GPIO banks Date: Thu, 31 Mar 2016 11:10:59 +0200 Message-Id: <1459415459-8107-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Neil Armstrong Cc: Rob Herring Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/gpio.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index 069cdf6f9dac..f509ecf03ece 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -131,6 +131,19 @@ Every GPIO controller node must contain both an empty "gpio-controller" property, and a #gpio-cells integer property, which indicates the number of cells in a gpio-specifier. +Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an +instance of a hardware IP core on a silicon die, usually exposed to the +programmer as a coherent range of I/O addresses. Usually each such bank is +exposed in the device tree as an individual gpio-controller node, reflecting +the fact that the hardware was synthesized by reusing the same IP block a +few times over. + +A GPIO controller may specify a bank ID. This is a hardware index that +indicate the logical order of the GPIO controller in the hardware architecture, +usually in the sequence 0, 1, 2 .. n. The hardware index may be different +from the order of register ranges and related to the backplane of how this +one bank is connected to the outside through a pin controller for example. + Optionally, a GPIO controller may have a "ngpios" property. This property indicates the number of in-use slots of available slots for GPIOs. The typical example is something like this: the hardware register is 32 bits @@ -152,6 +165,7 @@ gpio-controller@00000000 { reg = <0x00000000 0x1000>; gpio-controller; #gpio-cells = <2>; + gpio-bank = <0>; ngpios = <18>; }