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[139.162.244.187]) by smtp.gmail.com with ESMTPSA id e72sm7464075wma.5.2017.03.25.11.24.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 25 Mar 2017 11:24:06 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Mathieu Poirier , Guodong Xu , John Stultz , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, mike.leach@linaro.org, Suzuki.Poulose@arm.com, sudeep.holla@arm.com Cc: Leo Yan Subject: [PATCH v5 2/9] doc: Add documentation for Coresight CPU debug Date: Sun, 26 Mar 2017 02:23:10 +0800 Message-Id: <1490466197-29163-3-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490466197-29163-1-git-send-email-leo.yan@linaro.org> References: <1490466197-29163-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update kernel-parameters.txt to add two new parameters: - coresight_cpu_debug.enable is a knob to enable debugging at boot time. - coresight_cpu_debug.idle_constraint is used to constrain idle states to ensure Coresight CPU debug component can be accessible. Signed-off-by: Leo Yan --- Documentation/admin-guide/kernel-parameters.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 2ba45ca..6ed57d9 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -650,6 +650,27 @@ /proc//coredump_filter. See also Documentation/filesystems/proc.txt. + coresight_cpu_debug.enable + [ARM,ARM64] + Format: + Enable/disable the CPU sampling based debugging. + 0: default value, disable debugging + 1: enable debugging at boot time + + coresight_cpu_debug.idle_constraint + [ARM,ARM64] + Format: + Some platforms have designed the idle states to disable + CPU power domain and need manually set constraint so + can access coresight CPU debug component safely. Setting + this parameter for latency requirement in + microseconds, finally we can constraint all or partial + idle states to ensure the CPU power domain is enabled. + Default is -1, which means no limiation to CPU idle + states; if set to 0, this means disabling all idle + states; user can choose other platform dependent values + so can disable specific idle states for the platform. + cpuidle.off=1 [CPU_IDLE] disable the cpuidle sub-system