From patchwork Tue Jan 23 15:45:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 125551 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp1832476ljf; Tue, 23 Jan 2018 07:46:11 -0800 (PST) X-Google-Smtp-Source: AH8x226MJUUPRVSa9wxp13Ti1ak8ovCkjl1y2I5ppWA/8FTLsK/ep5E7qAu9Ajx7mftWNXoUGH8X X-Received: by 10.36.121.211 with SMTP id z202mr3998278itc.107.1516722370911; Tue, 23 Jan 2018 07:46:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516722370; cv=none; d=google.com; s=arc-20160816; b=A/mUTTnNsLp2+z3g87CI8MwrPbntYvZ7dggARyGNyaENmM8ylSGkujnDqe6Qy5qxzz pc4iziVvuUoUtvYAHsuihCnEdLcVSPsXtqsmHqx4JjF5DUAIVwjaP3y1Afkr3nWJRAgf 7cJpu6HAFpwhYsCRasZphQwY9DZxCB4/bn0YotgdW9tBymH/boKbynbZ8QBxzie5naKr aJvHe0ljac94hQcCr5PJqM/ZOyvxqYAHfl/Qr26taKIQkGPbP4PG18NJGcWNufqoi8pz 0mFh1iA6JLxeT3SoMkc8yEWvIUPRvqqy/VcPEM0R0xkBhAi2MNp0f5S/UXVq0akR6d5P CjUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=rcsSs3/YsSOVz5HRfSDklBOHl07Bi+0gTgBSe0rgIB4=; b=xaBls2q6Qvkl5IQr18JfBC8qoQQTBrrz96tiCRQdepl4Nwadxf/ss0Y+rFmG6eUK+t 5bbv2Ty1sZufZEZ6gwwaX4QN17A6fcSBprHL9KsXtav09rKZzkTfospI+E4IcE8Xr4iQ 0sdqBnQ+0N6LWoFPxuYItJ+BM2aPxEWPmHlLyKFNcBuphwtI4AFBFDu2rF7DnJLdwapR l6MBm7c7me0fIdKEAordywKS/ozry1vlTxNUbu3HwHYQ9VPqNjiaoC9CGZ6nY0Bt+I77 FsAY9Ey1qvzpybqMW8ypEg7FKAP6nlcqZacgg5+2dwz4wjvuzhyqRDY1ai/nezdRUYta 2oRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CbZ1MtFp; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n126si8260643itd.147.2018.01.23.07.46.10; Tue, 23 Jan 2018 07:46:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CbZ1MtFp; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752376AbeAWPqJ (ORCPT + 6 others); Tue, 23 Jan 2018 10:46:09 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:46461 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751920AbeAWPqF (ORCPT ); Tue, 23 Jan 2018 10:46:05 -0500 Received: by mail-pg0-f67.google.com with SMTP id s9so531571pgq.13 for ; Tue, 23 Jan 2018 07:46:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mjM1DSiIUACd4y5QE0/9w5qgYKMlONEy8x+OQOLz/Eo=; b=CbZ1MtFpFHGazrov5CLewu08pJNV4LIR0OexPKPQoNektNqVEmpOrvzogTWtxMQeWV n0ikQrkLf+rus3n5CQ75wS+am8/baycLBAVMgeWcPnjvoudSTUFeTWegq+IXEaf2hcgt qrb8990tRyDeVyYTh/nkAvRCg1xSm5mawZ/Hs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mjM1DSiIUACd4y5QE0/9w5qgYKMlONEy8x+OQOLz/Eo=; b=IABVzbDzmS2dGrCDGuCWLQCBPfxcofiRrg2q0y/7EGRPhLnNBk2fhjbgDml0RRyMBe csdGl09LXx4J+iE+hWkl8OMtg5LQU4lKAvMp9fSBoTa1WOrtikT29xZZbeQXbTHu5pdE mnDXeOqQP7qRJ7FbgJCTdk1Lzoc0fz/9tyCojavtIvr06sd2HLbxcVeJGZkLqpWczI9u PMwFWHQqbv0840tz4obDnkXzg08b1j072+Q0q+zXtgK83dF9Pg929IFw6YjkNnoPrRo6 E6niCAIHXqXPiPaNJfDNPhhdnrdajMi8NA6iLE/1szOuwpoXoiHJ+hkJeVfYfPEZ8lCK nN8A== X-Gm-Message-State: AKwxytdMxzblG653iKmk4saB/DVEyXkg77+O3poIvVtaFv0n3asooQ/Q 30s7MLD1QymzYY0RBpJakICDFh3uS2k= X-Received: by 10.98.192.10 with SMTP id x10mr10915767pff.27.1516722364900; Tue, 23 Jan 2018 07:46:04 -0800 (PST) Received: from localhost.localdomain ([45.56.152.94]) by smtp.gmail.com with ESMTPSA id v15sm7229037pfa.68.2018.01.23.07.46.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Jan 2018 07:46:04 -0800 (PST) From: Shawn Guo To: Bjorn Helgaas Cc: Rob Herring , Fabio Estevam , Jianguo Sun , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, project-aspen-dev@linaro.org, Shawn Guo Subject: [PATCH v2 2/2] PCI: histb: add an optional regulator for PCIe port power control Date: Tue, 23 Jan 2018 23:45:37 +0800 Message-Id: <1516722337-1533-3-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516722337-1533-1-git-send-email-shawn.guo@linaro.org> References: <1516722337-1533-1-git-send-email-shawn.guo@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The power supply to PCIe port are often controlled by GPIO on some board designs. Let's add an optional regulator which can be backed by GPIO to control the power. Signed-off-by: Shawn Guo --- .../bindings/pci/hisilicon-histb-pcie.txt | 1 + drivers/pci/dwc/pcie-histb.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt index c84bc027930b..f995664e6d7f 100644 --- a/Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt +++ b/Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt @@ -34,6 +34,7 @@ Required properties Optional properties: - reset-gpios: The gpio to generate PCIe PERST# assert and deassert signal. +- vpcie-supply: Should specify the regulator in charge of PCIe port power. - phys: List of phandle and phy mode specifier, should be 0. - phy-names: Must be "phy". diff --git a/drivers/pci/dwc/pcie-histb.c b/drivers/pci/dwc/pcie-histb.c index 6395394be5b4..8eb3028432b3 100644 --- a/drivers/pci/dwc/pcie-histb.c +++ b/drivers/pci/dwc/pcie-histb.c @@ -64,6 +64,7 @@ struct histb_pcie { struct reset_control *bus_reset; void __iomem *ctrl; int reset_gpio; + struct regulator *vpcie; }; static u32 histb_pcie_readl(struct histb_pcie *histb_pcie, u32 reg) @@ -230,6 +231,9 @@ static void histb_pcie_host_disable(struct histb_pcie *hipcie) if (gpio_is_valid(hipcie->reset_gpio)) gpio_set_value_cansleep(hipcie->reset_gpio, 0); + + if (hipcie->vpcie) + regulator_disable(hipcie->vpcie); } static int histb_pcie_host_enable(struct pcie_port *pp) @@ -240,6 +244,14 @@ static int histb_pcie_host_enable(struct pcie_port *pp) int ret; /* power on PCIe device if have */ + if (hipcie->vpcie) { + ret = regulator_enable(hipcie->vpcie); + if (ret) { + dev_err(dev, "failed to enable regulator: %d\n", ret); + return ret; + } + } + if (gpio_is_valid(hipcie->reset_gpio)) gpio_set_value_cansleep(hipcie->reset_gpio, 1); @@ -285,6 +297,8 @@ static int histb_pcie_host_enable(struct pcie_port *pp) err_sys_clk: clk_disable_unprepare(hipcie->bus_clk); err_bus_clk: + if (hipcie->vpcie) + regulator_disable(hipcie->vpcie); return ret; } @@ -334,6 +348,13 @@ static int histb_pcie_probe(struct platform_device *pdev) return PTR_ERR(pci->dbi_base); } + hipcie->vpcie = devm_regulator_get_optional(dev, "vpcie"); + if (IS_ERR(hipcie->vpcie)) { + if (PTR_ERR(hipcie->vpcie) == -EPROBE_DEFER) + return -EPROBE_DEFER; + hipcie->vpcie = NULL; + } + hipcie->reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &of_flags); if (of_flags & OF_GPIO_ACTIVE_LOW)