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[209.132.180.67]) by mx.google.com with ESMTP id j19-v6si18502342pgb.623.2018.09.18.06.32.23; Tue, 18 Sep 2018 06:32:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=E9snEzKa; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728413AbeIRTE7 (ORCPT + 6 others); Tue, 18 Sep 2018 15:04:59 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:52132 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727207AbeIRTE7 (ORCPT ); Tue, 18 Sep 2018 15:04:59 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w8IDWMIk091587 for ; Tue, 18 Sep 2018 08:32:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1537277542; bh=2xkM0bk9yXwMokbUpqlYEuEC6c/BQMMaZ3nXFSaJeLc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=E9snEzKa30jfQJCZD1F1uAfLV+c9ljHR7Mh0w7kHhhbGtqXOLKdCeZg0vP0RxldRV XH8oteB1acfytYk+OTJtoIPGpBuk+ynHuyBvS3YZfPNeo4tgd/Auo2pE1qViXwikLN AONw3DoY/ubHTl1wpWxIWY0MUvVZAzd5+H4wqmWY= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8IDWLSC014355 for ; Tue, 18 Sep 2018 08:32:21 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 18 Sep 2018 08:32:21 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 18 Sep 2018 08:32:21 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8IDWG2C016490; Tue, 18 Sep 2018 08:32:20 -0500 From: Jyri Sarha To: , , , , CC: Jyri Sarha , Subject: [tiL-k3-AD-4.19 PATCH 02/24] dt-bindings: display/ti: add am65x-dss bindings Date: Tue, 18 Sep 2018 16:31:50 +0300 Message-ID: <1537277532-6386-3-git-send-email-jsarha@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537277532-6386-1-git-send-email-jsarha@ti.com> References: <1537277532-6386-1-git-send-email-jsarha@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Tomi Valkeinen Add DT bindings for Texas Instruments AM65x SoC Display Subsystem. The DSS7 on AM65x SoC has two video ports (DPI and OLDI) and two video pipelines. Signed-off-by: Jyri Sarha Signed-off-by: Tomi Valkeinen Cc: devicetree@vger.kernel.org Signed-off-by: Jyri Sarha --- .../devicetree/bindings/display/ti/ti,am6-dss.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt new file mode 100644 index 0000000..3466f09 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt @@ -0,0 +1,16 @@ +Texas Instruments AM65x Display Subsystem +========================================== + +Required properties: +- compatible: "ti,am65x-dss", "ti,am6-dss" +- reg: address and length of the register spaces for DSS submodules +- reg-names: "common", "vidl1", "vid", "ovr1", "ovr2", "vp1", "vp2" +- clocks: phandle to fclk, vp1, and vp2 clocks +- clock-names: "fck", "vp1", "vp2" +- interrupts: phandle to the DISPC interrupt +- syscon: phandle to syscon device handling OLDI_PWRDN_TX (partition 1 of + AM654 CTRL MMR0) + +The DSS outputs are described using the device graphs as documented in +Documentation/devicetree/bindings/graph.txt. AM6 DSS has a DPI output as port 0 +and an OLDI output as port 1.