| Message ID | 1592903198-5505-8-git-send-email-yangtiezhu@loongson.cn |
|---|---|
| State | Accepted |
| Commit | f7dcfea3c6d5715b889adf61b78ddee80008682d |
| Headers | show |
| Series | [1/7,RESEND] irqchip: Fix potential resource leaks | expand |
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index b1db21e..13908ca 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -51,8 +51,8 @@ properties: description: | This property points how the children interrupts will be mapped into CPU interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 - and each bit in the cell refers to a children interrupt fron 0 to 31. - If a CPU interrupt line didn't connected with liointc, then keep it's + and each bit in the cell refers to a children interrupt from 0 to 31. + If a CPU interrupt line didn't connected with liointc, then keep its cell with zero. $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 4
Fix the following two typos in loongson,liointc.yaml: fron -> from it's -> its Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> --- .../devicetree/bindings/interrupt-controller/loongson,liointc.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)