From patchwork Fri Aug 7 10:25:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 247548 Delivered-To: patch@linaro.org Received: by 2002:a92:cc90:0:0:0:0:0 with SMTP id x16csp2312594ilo; Fri, 7 Aug 2020 03:25:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyyAEJ8wXcWVX3tQcKBtq2vfPjZuvgyrk0YhP1VRMbs/2/ujcn+QcnN6JYoGFEOaDRp0dg7 X-Received: by 2002:a17:906:15d8:: with SMTP id l24mr8298230ejd.297.1596795937115; Fri, 07 Aug 2020 03:25:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596795937; cv=none; d=google.com; s=arc-20160816; b=pDPQXDUgiPpU9ggYNALCXEBVhUzlDIp0XtPzXtB1d2sMt5HgK33mTETf6E/JIIkKHp bte0L/7IH1eRgNrmw1r3uJBSpqJtapYBrUjyIfv9ebeWQ1myuXmwxIrOTGIg0BtKdz4M bfewY1WP06kgj8LQkL+dFd21htUspaErxsKcLSibZHeSZzCvoO3VCYOZCzZqwfakbhxp J0GVbX4rW+JjFnAAJcmi29PmT/w6+ADSJP+mUKSBHOuPp2j3Y+18SYArzTXQj9Evw9PX jTnNlTN2leYq0h8AStN6wi3tS8Rc8dD7ScJPQo2qubiLzLFPeL/sMEtBBgLz4X/1BFqg zb9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=mYgbU4Elt7Tg4MMG4gs4JOly2yQ0NgzfUVYTD/ADX9c=; b=srErEvNTO51sAx41nBKbP1MLvLNTFquMW/l83XEMkZkwfmw15SuFWjrJpYbm0aH+uf u2dTY3tq820BCsBT7FL3eORwkqR8vB4CFy9LXVUxmvrjrDbwFS8bYGQqSNjZztIwcniS OGXzBkAm2xaUcbfTNTgCL36urfVyILTvkh99o25QJxx6O4GWBEAWafgPWCIE40AdTGTZ vBimlJxLp20flkXRiO1vkhOCLkxHKOR8dvtKxAI7UYmDDPhO2uyRdzGRZYf03oBNnPow +vs9Xu+23W7zEt1UrtBbFu0HbGeBOOsc8nm3wMMCl0WCU4zpjO9FYD5DA5HPvtvSCfpO o+UQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v8si6015436edl.307.2020.08.07.03.25.36; Fri, 07 Aug 2020 03:25:37 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728294AbgHGKZg (ORCPT + 6 others); Fri, 7 Aug 2020 06:25:36 -0400 Received: from mx.socionext.com ([202.248.49.38]:31578 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727037AbgHGKZf (ORCPT ); Fri, 7 Aug 2020 06:25:35 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 07 Aug 2020 19:25:34 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id A9134180BB5; Fri, 7 Aug 2020 19:25:34 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 7 Aug 2020 19:25:34 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 11D2C1A0507; Fri, 7 Aug 2020 19:25:34 +0900 (JST) From: Kunihiko Hayashi To: Lorenzo Pieralisi , Bjorn Helgaas , Jingoo Han , Gustavo Pimentel , Rob Herring , Masahiro Yamada , Marc Zyngier Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v6 5/6] PCI: uniphier: Add iATU register support Date: Fri, 7 Aug 2020 19:25:21 +0900 Message-Id: <1596795922-705-6-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596795922-705-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1596795922-705-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This gets iATU register area from reg property. In Synopsys DWC version 4.80 or later, since iATU register area is separated from core register area, this area is necessary to get from DT independently. Signed-off-by: Kunihiko Hayashi --- drivers/pci/controller/dwc/pcie-uniphier.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c index 55a7166..93ef608 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier.c +++ b/drivers/pci/controller/dwc/pcie-uniphier.c @@ -471,6 +471,11 @@ static int uniphier_pcie_probe(struct platform_device *pdev) if (IS_ERR(priv->pci.dbi_base)) return PTR_ERR(priv->pci.dbi_base); + priv->pci.atu_base = + devm_platform_ioremap_resource_byname(pdev, "atu"); + if (IS_ERR(priv->pci.atu_base)) + priv->pci.atu_base = NULL; + priv->base = devm_platform_ioremap_resource_byname(pdev, "link"); if (IS_ERR(priv->base)) return PTR_ERR(priv->base);