From patchwork Mon Aug 31 15:09:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grzegorz Jaszczyk X-Patchwork-Id: 248747 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp3399562ilg; Mon, 31 Aug 2020 08:10:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxm5FG8dMyUxKU46g40d+8PC0RlSaeD62jVy9i25hH39NGze6OEtPWxEzNyykwLuGrooZax X-Received: by 2002:a17:906:6a52:: with SMTP id n18mr1534925ejs.58.1598886635421; Mon, 31 Aug 2020 08:10:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598886635; cv=none; d=google.com; s=arc-20160816; b=fjrmZ7yqAqlcM40cZTTCCTgH7NukA8yLN1KJfwB7kLtQyaLwvL/dzDtX5lhDZ+y8kZ r2AB2RaVDBSYXR0TlImIf5UsROkdqfIAON3+AcHAVF2hX8zjm3jvJt2EuTGj0aapBHRN Z+iEfdCm+TavOqbl/AGl1CSDaJt2dJsM56GaiJbGxBay0ikyOx00X2KTVCUtgYZ8xPyQ 3Ys6kq7P3n4AqJW6p8m/kbETF/pzM0dfcyLZUTdC+2ucYVyfxTonSosjl0ezEOlXwGz2 b4bu+mJwUUrnsjQYUUvdcZv/oFyk35k+rktIV9nsNciueITKIWXiPwUvIQ4VavsewFxl gu6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=frzL2DLHwYvpLbcVF+BQ0a2PY0Hd2ua7rlCrnnnS4iw=; b=HPZXzLIC/1bkhf4rjfkP96Wd5VyLSV1IsDBVYXgBPoxuHwf1jk5EBVpXavbUtSzmCU rz0B0wIjGy+fPMtOCKHgyS+AHCxIz6cHPpH4CBXxjuuF0ZxRgbTtzHul9volhjRs6rN5 EEwKFZaODyaobZ/rlc3GCYEqFCnkT1BXOVdWuJjNyceHWo9Gn3JEVEYqse+dkL4cWhcn A2FIPUoUDTGdEBB8M4RZud+qpkGSUddsA/S05+IZVDnCVEZcLYuYEO2GeTSBvlFcYTtD ht+/W2vmseswBM/ImhYVcv56mZ90RqJBdlurhBknPCBdA/z07gLWjEPiPUJpGa9J8OXR T7dQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="v/SH+3Dc"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y19si5945088eje.478.2020.08.31.08.10.35; Mon, 31 Aug 2020 08:10:35 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="v/SH+3Dc"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728193AbgHaPKd (ORCPT + 6 others); Mon, 31 Aug 2020 11:10:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728253AbgHaPKC (ORCPT ); Mon, 31 Aug 2020 11:10:02 -0400 Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B695C061239 for ; Mon, 31 Aug 2020 08:09:57 -0700 (PDT) Received: by mail-lj1-x242.google.com with SMTP id h19so7063916ljg.13 for ; Mon, 31 Aug 2020 08:09:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=frzL2DLHwYvpLbcVF+BQ0a2PY0Hd2ua7rlCrnnnS4iw=; b=v/SH+3DcvjR6ncLV6tiH90znZNadKgQC+vIO4xIGh55/i38oQEvRJ+I9L5caIWB+6i 0456I8RmmJffge+GR9BGkZZXSdTiumx2SEvuYnVP6MH2sSJoertZupabCrYNe2uaouAv iyIxc0rRUcMhFWhqQwAjUWr0xNEezSSj+1daCse0Ib2TRrDdz6U+3yqKR0mxPqczsJdl vRwYwkxg7KI+o1LKUc7zD33JvV4A4wSDDBHfG8KOOVTpUU9GgAARErQEm8/7FgXkcAcy 0ta6CVkGJJWkOvH7q5sBBg9qi59qZwgJDEWyAX7Xe1ZpRgcGC4o6ZYQnXAumCqhXSgVK u4IA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=frzL2DLHwYvpLbcVF+BQ0a2PY0Hd2ua7rlCrnnnS4iw=; b=rfDn6Bsx6rJVClWhSLBAqQxgDow36Z7Cq/9egubdaP2BAxe9E70WJlkcMldGDxhs01 aDFxDuBf8uJNoqpQcZgZq2Z8C76QLO/iRoOj+APL4h4ihN7EKxK4KRXQkExRUw7SFsny Xkk0Br+FivGPB57x3bTrKWXCmA7I+gN8KAOEc/rrUH2/4PPLg9Sl0RhXMLgD/ypULVcB thAGpkqCHOqThdQfw+E4PqRBta9OtKWDmqXFgZcDDg6rHLho7sOpVljp37elKeNnvmVR E+f3pYr+KyBGMMLfvOEwgfJudyrN5mLlFx/7DWDG9Y9i3IgSdOAEuR8lg2eQ7NgmCtFM 3y/Q== X-Gm-Message-State: AOAM530TiouAzC+H5AH7F8oCrjjE+411BZXsW7jWUx260CxtU0cN91me 66NQg/4ptneXaIo4AtWG+Q5KLg== X-Received: by 2002:a2e:9e16:: with SMTP id e22mr842894ljk.389.1598886596019; Mon, 31 Aug 2020 08:09:56 -0700 (PDT) Received: from gilgamesh.semihalf.com (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id w6sm2034388lfn.73.2020.08.31.08.09.54 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 31 Aug 2020 08:09:55 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Cc: grzegorz.jaszczyk@linaro.org, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, praneeth@ti.com Subject: [RESEND PATCH v5 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Date: Mon, 31 Aug 2020 17:09:18 +0200 Message-Id: <1598886558-16546-6-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598886558-16546-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1598886558-16546-1-git-send-email-grzegorz.jaszczyk@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Suman Anna The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP, commonly called ICSSG. The PRUSS INTC present within the ICSSG supports more System Events (160 vs 64), more Interrupt Channels and Host Interrupts (20 vs 10) compared to the previous generation PRUSS INTC instances. The first 2 and the last 10 of these host interrupt lines are used by the PRU and other auxiliary cores and sub-modules within the ICSSG, with 8 host interrupts connected to MPU. The host interrupts 5, 6, 7 are also connected to the other ICSSG instances within the SoC and can be partitioned as per system integration through the board dts files. Enhance the PRUSS INTC driver to add support for this ICSSG INTC instance. Signed-off-by: Suman Anna Signed-off-by: Grzegorz Jaszczyk --- v4->v5: - Rename: s/num_host_intrs/num_host_events/ regarding to change introduced in patch #2. v3->v4: - Move generic part to "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts" patch and leave only platform related code. v2->v3: - Change patch order: use it directly after "irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops" and before new "irqchip/irq-pruss-intc: Add event mapping support" in order to reduce diff. v1->v2: - https://patchwork.kernel.org/patch/11069773/ --- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-pruss-intc.c | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index a112a76..7fe4e30 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -495,7 +495,7 @@ config TI_SCI_INTA_IRQCHIP config TI_PRUSS_INTC tristate "TI PRU-ICSS Interrupt Controller" - depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE + depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3 select IRQ_DOMAIN help This enables support for the PRU-ICSS Local Interrupt Controller diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index 15f0407..9e540af 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -622,11 +622,20 @@ static const struct pruss_intc_match_data pruss_intc_data = { .num_host_events = 10, }; +static const struct pruss_intc_match_data icssg_intc_data = { + .num_system_events = 160, + .num_host_events = 20, +}; + static const struct of_device_id pruss_intc_of_match[] = { { .compatible = "ti,pruss-intc", .data = &pruss_intc_data, }, + { + .compatible = "ti,icssg-intc", + .data = &icssg_intc_data, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, pruss_intc_of_match);