From patchwork Wed Jan 27 08:55:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 371491 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp100051jam; Wed, 27 Jan 2021 01:50:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJxjANoIkUDdIh+szPkGSDp071PUKjg9+yLS2p2IR+xaI/KUWjM4mG8h/bSumrbg/L/x+HmY X-Received: by 2002:a50:9310:: with SMTP id m16mr8286215eda.94.1611741040690; Wed, 27 Jan 2021 01:50:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611741040; cv=none; d=google.com; s=arc-20160816; b=yK7nW0c9qpRcGT46Z262FI2UitNSBMl71+GsOkP/VxNc7yc8uuopu3DH2PxE8lAD6U 847ytzn/WJYMcnTYsE5GK5y7aC9Ix4dV5WynJZPSHAiUpG++hzRO8T/MmkGviC13pPNr SO5bFLXSOmREMU10lVMF3M2iAzbZOHdlOVKWU2LlcXqB0etp3in5lsniEeZ0iyzhZA6E jLYmbWtE/UkYLDdAhQqjMNkt14NwXpNNp9f2BqJd+X5/3TnRdh0nyc4l1kp/HgL2/bQy bhKRxCINc6Y3pzWTvS2ZWIJqGckP3pHKPqZ2fXDbyvHf2ha0zPSXZKibxDFXYrAk/TYl fmsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=LegMTuNa+Ti8qjKheq2DRjQ2uwZUpbEhWrN3ktWE7sk=; b=aMqzSeVbXyZLKfzZjlEWYIi/PTdxQdi1/E5Sx7iGTaFWEWuj1laJCFCbhMG19BUIy+ skTKrQkgkDkr2zpFUXxeL5S/C5Pmpz/WZwvIcC1zpoyuNReKn86HBhDNySb6wadMPX04 2IVGzD4sczKwlSC6H6aSxC2LhgPMojjzwfRmQ1IR4FAHrj2p7si2TIkbEG0vkpvK9AcQ kQEs7QC2LaRGTvhbqhZqsu2qKGKYBKOYvMfWXxyaDnOMuCsSLwhr+KOvfRXJN9JTntRn hIYLhAnrrfEqJi0vyV9EXF9U1ZF5mr9cCkFfLJ+kjxhSFqt2I4XhmH0E7QWcoksNyrv4 +d4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ga14si612748ejb.267.2021.01.27.01.50.40; Wed, 27 Jan 2021 01:50:40 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229832AbhA0Js5 (ORCPT + 6 others); Wed, 27 Jan 2021 04:48:57 -0500 Received: from foss.arm.com ([217.140.110.172]:32958 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233386AbhA0I7I (ORCPT ); Wed, 27 Jan 2021 03:59:08 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1AD601516; Wed, 27 Jan 2021 00:56:04 -0800 (PST) Received: from p8cg001049571a15.arm.com (unknown [10.163.91.246]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D70823F66B; Wed, 27 Jan 2021 00:56:00 -0800 (PST) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, mike.leach@linaro.org, lcherian@marvell.com, linux-kernel@vger.kernel.org, Anshuman Khandual , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH V3 12/14] dts: bindings: Document device tree bindings for Arm TRBE Date: Wed, 27 Jan 2021 14:25:36 +0530 Message-Id: <1611737738-1493-13-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611737738-1493-1-git-send-email-anshuman.khandual@arm.com> References: <1611737738-1493-1-git-send-email-anshuman.khandual@arm.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Suzuki K Poulose Document the device tree bindings for Trace Buffer Extension (TRBE). Cc: Anshuman Khandual Cc: Mathieu Poirier Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Suzuki K Poulose Signed-off-by: Anshuman Khandual --- Changes in V3: - Added missing description for the TRBE hardware - Fixed all DT yaml semantics problems Documentation/devicetree/bindings/arm/trbe.yaml | 49 +++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/trbe.yaml -- 2.7.4 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/trbe.yaml b/Documentation/devicetree/bindings/arm/trbe.yaml new file mode 100644 index 0000000..4402d7b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/trbe.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright 2021, Arm Ltd +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/trbe.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ARM Trace Buffer Extensions + +maintainers: + - Anshuman Khandual + +description: | + Arm Trace Buffer Extension (TRBE) is a per CPU component + for storing trace generated on the CPU to memory. It is + accessed via CPU system registers. The software can verify + if it is permitted to use the component by checking the + TRBIDR register. + +properties: + $nodename: + const: "trbe" + compatible: + items: + - const: arm,trace-buffer-extension + + interrupts: + description: | + Exactly 1 PPI must be listed. For heterogeneous systems where + TRBE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + maxItems: 1 + +required: + - compatible + - interrupts + +additionalProperties: false + +examples: + + - | + #include + + trbe { + compatible = "arm,trace-buffer-extension"; + interrupts = ; + }; +...