From patchwork Tue Mar 9 00:37:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 395938 Delivered-To: patch@linaro.org Received: by 2002:a17:906:a383:0:0:0:0 with SMTP id k3csp2290466ejz; Mon, 8 Mar 2021 16:48:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJxISW6WeYZpsw/LjzX2S8VMoXL1zt/HVcLsg+Rnh6kqCqo7FdRi9lAliBMPFcLun+MF3VXa X-Received: by 2002:a17:906:85b:: with SMTP id f27mr17892406ejd.414.1615250890868; Mon, 08 Mar 2021 16:48:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615250890; cv=none; d=google.com; s=arc-20160816; b=TxE83ob93Ant+i3JnCCSj68+LSsDTBApss0BRrRvMXt8YJ0M24XoZk3OVOQ6bxKjZj iq/hh6P6pO3b6a6ta+2wMsusUmeT9mI2Dvn8KgOSkJF7rr6sLXwX9JdrODMJz0sv+TQu hjtspcWDlN6uoAE9UoalYss/cVJyrUrzAGqTTTQXnawxnKo5FJ/B/E5pKwMR0fTABPH7 CSKRcxXtQ9q5ZZB72I3HFhRH2ueccD3I+uNySqarExnu34NshI9qZ1jVTccGpA5DpeDu /m38Aq5vDmpHsDEtj9MxYjAVUkD507QpYVyJvreoY04ca04QKQHZetDE5b+e+vJTZvW9 TejA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=5bX1dIl3NC+BPRBI/h2IDEzgG9qM0/m0j/jt4p0I0Aw=; b=vyJelqYtRG0Ecg4lDG6y4EjCXJqUDKLKxOU9iu35NmNVg9Q4VQobDitj4ePPohgM46 VLAnKSZ8avTPz8h3Yj7rfN079plhaLw4v27STXH2Tyb51hRDBQ1qKHJsLGONvFpb1jBT kAtNl/+x8g2EDJqjrLpJmjUFYaQSGfMxjxDEUNpMT2PovjdSogxJHavbQOmi/jRc0CTZ bpsRDDFfShboBDBVqbMg1DAd+3hUE+PVgsnSs+LZ2MVIOTMj8mjIXjFrtIaagEsinAEq M1X2VpFzr5kHm2Dw/kOG80x1H6GiJpYOnb1Wz5L1RZAAAcG0zWNGNt6RElD6JKs3HdCk 2GKw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u10si7755491ejb.59.2021.03.08.16.48.10; Mon, 08 Mar 2021 16:48:10 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229718AbhCIArh (ORCPT + 6 others); Mon, 8 Mar 2021 19:47:37 -0500 Received: from mx.socionext.com ([202.248.49.38]:24398 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229517AbhCIArP (ORCPT ); Mon, 8 Mar 2021 19:47:15 -0500 X-Greylist: delayed 580 seconds by postgrey-1.27 at vger.kernel.org; Mon, 08 Mar 2021 19:47:15 EST Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 09 Mar 2021 09:37:35 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id A6F852059035; Tue, 9 Mar 2021 09:37:35 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 9 Mar 2021 09:37:35 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan2.css.socionext.com (Postfix) with ESMTP id 3C59AB1D40; Tue, 9 Mar 2021 09:37:35 +0900 (JST) From: Kunihiko Hayashi To: Rob Herring , Arnd Bergmann Cc: Masami Hiramatsu , Jassi Brar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 2/2] arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E Date: Tue, 9 Mar 2021 09:37:16 +0900 Message-Id: <1615250236-11349-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1615250236-11349-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1615250236-11349-1-git-send-email-hayashi.kunihiko@socionext.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org After applying the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration register for TXDLY and RXDLY is set correctly. Although some boards have RTL8211E for gigabit network PHY, it turrned out that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property to 'rgmii-id' as default. Signed-off-by: Kunihiko Hayashi --- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 52dee61..bd9959f 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -806,7 +806,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 80e2597..2038f51 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -564,7 +564,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; @@ -585,7 +585,7 @@ clocks = <&sys_clk 7>; reset-names = "ether"; resets = <&sys_rst 7>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 1>;