From patchwork Mon Jun 28 18:20:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 468470 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1707C11F6B for ; Mon, 28 Jun 2021 18:21:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C9E6F61C82 for ; Mon, 28 Jun 2021 18:21:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234318AbhF1SXY (ORCPT ); Mon, 28 Jun 2021 14:23:24 -0400 Received: from out28-195.mail.aliyun.com ([115.124.28.195]:58649 "EHLO out28-195.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233444AbhF1SXU (ORCPT ); Mon, 28 Jun 2021 14:23:20 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.09420402|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.00745146-0.000210352-0.992338; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047213; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=14; RT=14; SR=0; TI=SMTPD_---.KZOO9TY_1624904444; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KZOO9TY_1624904444) by smtp.aliyun-inc.com(10.147.42.253); Tue, 29 Jun 2021 02:20:50 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, paul@crapouillou.net, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v5 01/11] clk: JZ4780: Add function for disable the second core. Date: Tue, 29 Jun 2021 02:20:34 +0800 Message-Id: <1624904444-2618-2-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624904444-2618-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624904444-2618-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add "jz4780_core1_disable()" for disable the second core of JZ4780, prepare for later commits. Signed-off-by: 周琰杰 (Zhou Yanjie) Reviewed-by: Paul Cercueil --- Notes: v1->v2: Add Paul Cercueil's Reviewed-by. v2->v3: No change. v3->v4: No change. v4->v5: No change. drivers/clk/ingenic/jz4780-cgu.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/clk/ingenic/jz4780-cgu.c b/drivers/clk/ingenic/jz4780-cgu.c index 0268d23..dcca74e 100644 --- a/drivers/clk/ingenic/jz4780-cgu.c +++ b/drivers/clk/ingenic/jz4780-cgu.c @@ -252,8 +252,29 @@ static int jz4780_core1_enable(struct clk_hw *hw) return 0; } +static void jz4780_core1_disable(struct clk_hw *hw) +{ + struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); + struct ingenic_cgu *cgu = ingenic_clk->cgu; + unsigned long flags; + u32 lcr, clkgr1; + + spin_lock_irqsave(&cgu->lock, flags); + + lcr = readl(cgu->base + CGU_REG_LCR); + lcr |= LCR_PD_SCPU; + writel(lcr, cgu->base + CGU_REG_LCR); + + clkgr1 = readl(cgu->base + CGU_REG_CLKGR1); + clkgr1 |= CLKGR1_CORE1; + writel(clkgr1, cgu->base + CGU_REG_CLKGR1); + + spin_unlock_irqrestore(&cgu->lock, flags); +} + static const struct clk_ops jz4780_core1_ops = { .enable = jz4780_core1_enable, + .disable = jz4780_core1_disable, }; static const s8 pll_od_encoding[16] = {