From patchwork Thu Aug 26 13:15:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajesh Patil X-Patchwork-Id: 503002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06A4CC00143 for ; Thu, 26 Aug 2021 13:16:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E71D360FD8 for ; Thu, 26 Aug 2021 13:16:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242685AbhHZNRD (ORCPT ); Thu, 26 Aug 2021 09:17:03 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:48550 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242680AbhHZNRB (ORCPT ); Thu, 26 Aug 2021 09:17:01 -0400 Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 26 Aug 2021 06:16:14 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 26 Aug 2021 06:16:13 -0700 X-QCInternal: smtphost Received: from rajpat-linux.qualcomm.com ([10.206.21.0]) by ironmsg02-blr.qualcomm.com with ESMTP; 26 Aug 2021 18:45:55 +0530 Received: by rajpat-linux.qualcomm.com (Postfix, from userid 2344945) id 50EF821288; Thu, 26 Aug 2021 18:45:56 +0530 (IST) From: Rajesh Patil To: Andy Gross , Bjorn Andersson , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, rnayak@codeaurora.org, saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com, skakit@codeaurora.org, sboyd@kernel.org, Rajesh Patil Subject: [PATCH V6 7/7] arm64: dts: sc7280: Add aliases for I2C and SPI Date: Thu, 26 Aug 2021 18:45:31 +0530 Message-Id: <1629983731-10595-8-git-send-email-rajpat@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1629983731-10595-1-git-send-email-rajpat@codeaurora.org> References: <1629983731-10595-1-git-send-email-rajpat@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add aliases for i2c and spi for sc7280 soc. Signed-off-by: Rajesh Patil --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 32f411f..c659f61 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -28,6 +28,38 @@ aliases { mmc1 = &sdhc_1; mmc2 = &sdhc_2; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + i2c9 = &i2c9; + i2c10 = &i2c10; + i2c11 = &i2c11; + i2c12 = &i2c12; + i2c13 = &i2c13; + i2c14 = &i2c14; + i2c15 = &i2c15; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi6 = &spi6; + spi7 = &spi7; + spi8 = &spi8; + spi9 = &spi9; + spi10 = &spi10; + spi11 = &spi11; + spi12 = &spi12; + spi13 = &spi13; + spi14 = &spi14; + spi15 = &spi15; }; clocks {