From patchwork Mon Mar 27 07:58:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 96030 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp1109252qgd; Mon, 27 Mar 2017 01:00:08 -0700 (PDT) X-Received: by 10.98.39.134 with SMTP id n128mr24111803pfn.17.1490601608354; Mon, 27 Mar 2017 01:00:08 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e5si11801529plk.257.2017.03.27.01.00.08; Mon, 27 Mar 2017 01:00:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751499AbdC0H7e (ORCPT + 7 others); Mon, 27 Mar 2017 03:59:34 -0400 Received: from mail-lf0-f45.google.com ([209.85.215.45]:33466 "EHLO mail-lf0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752172AbdC0H7b (ORCPT ); Mon, 27 Mar 2017 03:59:31 -0400 Received: by mail-lf0-f45.google.com with SMTP id h125so15962381lfe.0 for ; Mon, 27 Mar 2017 00:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hiDVX8ZZ1iehFXM/+JipUZlpYUwiafTfpez/1AXJORI=; b=HhXYcvh9MrlJ/r0uwN4NgRQNyhVyjbgaAlRs2jo1fOie+uE3lA91MQGBkwuxLs4xPl UKiFOpUQ+/Hcien16MP+6hhhX9YsTKAQyQw97wJQ5cHAS5oIgJ48HpIhQnYitu1heOSk FTz0gUgdWcMaMJKbMGObd0c7jAV+hMhzl5T+M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hiDVX8ZZ1iehFXM/+JipUZlpYUwiafTfpez/1AXJORI=; b=fON3jPYIpuTY6NlD0wnycYaohMAiWd2u1RftG+5fPbEmW4x8y8PMkNPtFiFBBIkldV RaOV8mibJqkgvwsPDcy+QWt3xluNC6wi8KwSmAm1NPLxQBPJBoyclaN2frl4AerL7oNI BbVvaREiPDGe6KlZoIxiOqTMmsU0lUSWaM4PUi/Ycftz/VCWaxF/tyh+amNucJEjbhOx 9YUQmX/Y1ixZXn0br6t20ZomzGNMIyKjtVb+F/JmavZGlk0FMxkq8z2lLoRfCI3I53eA wJ7FAqHNS0yYRnPU2Tk9FFoMBUagTU8Ne5wDPUqYGr+tC73+iaeOzEppPUgRlA+MMSu5 egGQ== X-Gm-Message-State: AFeK/H3jv+Rg1lY4POl89qY2ZSU0JzCxpEOVIeU+m8sFRWBY5FPYxcn0zVqvZI+oR1QRQDFH X-Received: by 10.25.26.135 with SMTP id a129mr4096202lfa.179.1490601539721; Mon, 27 Mar 2017 00:58:59 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id h7sm1869756lji.10.2017.03.27.00.58.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Mar 2017 00:58:58 -0700 (PDT) From: Linus Walleij To: Jonathan Cameron , linux-iio@vger.kernel.org Cc: Linus Walleij , devicetree@vger.kernel.org, Rob Herring Subject: [PATCH 1/5 v2] iio: xoadc: augment DT bindings a bit Date: Mon, 27 Mar 2017 09:58:54 +0200 Message-Id: <20170327075854.7390-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to accommodate in a logical manner for the premuxed channels in PM8921 and the similarly addressed channels in later PMICs, we need a twocell arrangement with premux and analog mux setting as a tuple to uniquely identify a hardware channel. These bindings are not yet in use, so it should be fine to augment them before we actually start using it in drivers and device trees. This scheme came out of lengthy discussions and reverse-engineering and reading of the few information sources we have. Cc: devicetree@vger.kernel.org Cc: Rob Herring Suggested-by: Björn Andersson Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Name nodes with <01 02> in a foo@0102 pattern. - Minor spelling nits. - Delete flimsy leftover docs from an interrim development path. --- .../bindings/iio/adc/qcom,pm8xxx-xoadc.txt | 104 +++++++++++---------- 1 file changed, 56 insertions(+), 48 deletions(-) -- 2.9.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt index 53cd146d8096..ade545487ce6 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt @@ -19,32 +19,42 @@ Required properties: with PMIC variant but is typically something like 2.2 or 1.8V. The following required properties are standard for IO channels, see -iio-bindings.txt for more details: +iio-bindings.txt for more details, but noitice that this particular +ADC has a special adressing scheme that require two cells for +identifying each ADC channel: -- #address-cells: should be set to <1> +- #address-cells: should be set to <2>, the first cell is the + prescaler (on PM8058) or premux (on PM8921) with two valid bits + so legal values are 0x00, 0x01 or 0x02. The second cell + is the main analog mux setting (0x00..0x0f). The combination + of prescaler/premux and analog mux uniquely addresses a hardware + channel on all systems. - #size-cells: should be set to <0> -- #io-channel-cells: should be set to <1> +- #io-channel-cells: should be set to <2>, again the cells are + precaler or premux followed by the analog muxing line. - interrupts: should refer to the parent PMIC interrupt controller and reference the proper ADC interrupt. Required subnodes: -The ADC channels are configured as subnodes of the ADC. Since some of -them are used for calibrating the ADC, these nodes are compulsory: +The ADC channels are configured as subnodes of the ADC. -adc-channel@c { - reg = <0x0c>; +Since some of them are used for calibrating the ADC, these nodes are +compulsory: + +adc-channel@000c { + reg = <0x00 0x0c>; }; -adc-channel@d { - reg = <0x0d>; +adc-channel@000d { + reg = <0x00 0x0d>; }; -adc-channel@f { - reg = <0x0f>; +adc-channel@000f { + reg = <0x00 0x0f>; }; These three nodes are used for absolute and ratiometric calibration @@ -52,13 +62,13 @@ and only need to have these reg values: they are by hardware definition 1:1 ratio converters that sample 625, 1250 and 0 milliV and create an interpolation calibration for all other ADCs. -Optional subnodes: any channels other than channel 0x0c, 0x0d and -0x0f are optional. +Optional subnodes: any channels other than channels [0x00 0x0c], +[0x00 0x0d] and [0x00 0x0f] are optional. Required channel node properties: - reg: should contain the hardware channel number in the range - 0 .. 0x0f (4 bits). The hardware only supports 16 channels. + 0 .. 0xff (8 bits). Optional channel node properties: @@ -94,56 +104,54 @@ Example: xoadc: xoadc@197 { compatible = "qcom,pm8058-adc"; reg = <0x197>; - interrupt-parent = <&pm8058>; - interrupts = <76 1>; - #address-cells = <1>; + interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <2>; #size-cells = <0>; - #io-channel-cells = <1>; + #io-channel-cells = <2>; - vcoin: adc-channel@0 { - reg = <0x00>; + vcoin: adc-channel@0000 { + reg = <0x00 0x00>; }; - vbat: adc-channel@1 { - reg = <0x01>; + vbat: adc-channel@0001 { + reg = <0x00 0x01>; }; - dcin: adc-channel@2 { - reg = <0x02>; + dcin: adc-channel@0002 { + reg = <0x00 0x02>; }; - ichg: adc-channel@3 { - reg = <0x03>; + ichg: adc-channel@0030 { + reg = <0x00 0x03>; }; - vph_pwr: adc-channel@4 { - reg = <0x04>; + vph_pwr: adc-channel@0004 { + reg = <0x00 0x04>; }; - usb_vbus: adc-channel@a { - reg = <0x0a>; + usb_vbus: adc-channel@000a { + reg = <0x00 0x0a>; }; - die_temp: adc-channel@b { - reg = <0x0b>; + die_temp: adc-channel@000b { + reg = <0x00 0x0b>; }; - ref_625mv: adc-channel@c { - reg = <0x0c>; + ref_625mv: adc-channel@000c { + reg = <0x00 0x0c>; }; - ref_1250mv: adc-channel@d { - reg = <0x0d>; + ref_1250mv: adc-channel@000d { + reg = <0x00 0x0d>; }; - ref_325mv: adc-channel@e { - reg = <0x0e>; + ref_325mv: adc-channel@000e { + reg = <0x00 0x0e>; }; - ref_muxoff: adc-channel@f { - reg = <0x0f>; + ref_muxoff: adc-channel@000f { + reg = <0x00 0x0f>; }; }; - /* IIO client node */ iio-hwmon { compatible = "iio-hwmon"; - io-channels = <&xoadc 0x01>, /* Battery */ - <&xoadc 0x02>, /* DC in (charger) */ - <&xoadc 0x04>, /* VPH the main system voltage */ - <&xoadc 0x0b>, /* Die temperature */ - <&xoadc 0x0c>, /* Reference voltage 1.25V */ - <&xoadc 0x0d>, /* Reference voltage 0.625V */ - <&xoadc 0x0e>; /* Reference voltage 0.325V */ + io-channels = <&xoadc 0x00 0x01>, /* Battery */ + <&xoadc 0x00 0x02>, /* DC in (charger) */ + <&xoadc 0x00 0x04>, /* VPH the main system voltage */ + <&xoadc 0x00 0x0b>, /* Die temperature */ + <&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */ + <&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */ + <&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */ };