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[209.132.180.67]) by mx.google.com with ESMTP id 73si3760780pld.154.2017.08.09.19.29.30; Wed, 09 Aug 2017 19:29:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=F7xknfoV; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752547AbdHJC33 (ORCPT + 6 others); Wed, 9 Aug 2017 22:29:29 -0400 Received: from mail-pf0-f174.google.com ([209.85.192.174]:34537 "EHLO mail-pf0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752192AbdHJC0v (ORCPT ); Wed, 9 Aug 2017 22:26:51 -0400 Received: by mail-pf0-f174.google.com with SMTP id o86so35237199pfj.1 for ; Wed, 09 Aug 2017 19:26:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ncg8cTa9krJFJEx97Y7xwDrCg2+9MJGZYRzRB/q9pCc=; b=F7xknfoVMLQKCU36ZTv0tOG0BGOew/lcicDLMoq2nRG7Ux+cLl7vzczOCIveAwyW5+ QRLdSMjWe/TV+6n6SVJ+OcDPgAlljb6kR+Ryo73/5RwGDUiQD+74JbNzBej5pIR/X9c0 509taqANt6R1egpX3AQpcy3pIW7E5je8Zqyk4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ncg8cTa9krJFJEx97Y7xwDrCg2+9MJGZYRzRB/q9pCc=; b=jCT4sR3xY8Od+r89jwSGq2FTEc49MFF0Jz1W5M9rOkcgnLVQnkOWkPlvGLCcENB4Bj UnUh5PMsDUbgN2zKqFKRvaSFluBA3nuvPoXXM49YNT7qWktI31qlQk2zz4ywMiHEuyrT tCWgm0pCCqbUUfBwugslUmuM0zWnDSIqCPkP8K1HCCQi4QSbtH14LocC0PmnOx9rpdiM RJrIqjrMh/nwsfYBaQXDRzUBheWt5H32jo+U8Mx34k9RP2DLlhF7ET9UVLqti2z6hPpg 0q5Iwdw/UaF8MfrLqgJmYP04EQriFZha0WxxZCxA9JkZX+k5gHmYSdF8fJo9tdG0Jl6L BTbQ== X-Gm-Message-State: AHYfb5gzT9w1/9jN8Xw3gpG50Z85alkwwSuvTcCFTFsDgFjLfj0lFgTj 7WwBj+BG1OuuFwe2 X-Received: by 10.98.27.206 with SMTP id b197mr10372446pfb.149.1502332010990; Wed, 09 Aug 2017 19:26:50 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.41.135.55]) by smtp.gmail.com with ESMTPSA id s11sm7789166pgr.53.2017.08.09.19.26.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 09 Aug 2017 19:26:50 -0700 (PDT) From: Guodong Xu To: xuwei5@hisilicon.com, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, keescook@chromium.org, anton@enomsg.org, ccross@android.com, tony.luck@intel.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, YiPing Xu , Zhong Kaihua , Leo Yan Subject: [PATCH v2 3/9] arm64: dts: hi3660: add pmu dt node for hi3660 Date: Thu, 10 Aug 2017 10:26:09 +0800 Message-Id: <20170810022615.19204-4-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170810022615.19204-1-guodong.xu@linaro.org> References: <20170810022615.19204-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: YiPing Xu Add pmu dt node for hi3660 Signed-off-by: YiPing Xu Signed-off-by: Zhong Kaihua Signed-off-by: Leo Yan Tested-by: Jumana Mundichipparakkal --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 1cdd03b..5fd5686 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>, + <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>;