From patchwork Mon Oct 16 04:01:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 115896 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp3248438qgn; Sun, 15 Oct 2017 21:03:04 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QWpCjaICqh39/M7qBmItoy2LsfXGHxE/Qf0t48vF/ZFjENWrrPKaFUNUKU7OHhR0JOy2BP X-Received: by 10.84.177.36 with SMTP id w33mr4134096plb.215.1508126584355; Sun, 15 Oct 2017 21:03:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508126584; cv=none; d=google.com; s=arc-20160816; b=emIm0JpRbF6y+Rs9Pncss4kSokfo15U31JbbZnZ97eKMmhOwvXOADhF4BrvcgBkIys zh0YuWBABd2+PjQ5QCSTi8KYeuekoajwZTc2X91DgOmtJSPWUtOQBnGiTOPHvdGixgOb GTAHgSkJvAH/puuxClX1w2oFQjBrYW87q0lPhixgIMlZRh64db7ogHbkrfciumMPLnyT QanwZxuIbk1z3qhUKtQ7VCue6NsDkqgQn6QsjVbZAZMp2F4U3HpbDzHM09vsBhppwNWb FL6Ko/paJTOqRicbMAeuzAxl6dIeKRwrlO8nGKXhZ/4TLgyXLz9oz50+qeIYpgu3C4fm GcCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=8jIy3kXjcOb7QFb2nR0sK4SFWvu0vGcFlsa6eA03uF0=; b=ioQiGQow3p2K7ZqZBkrESNU8UQF7fyR7a4j6bIHfTu/lks2tKGxu7PCwmh7DUsCGgP zGTKXpu300x7lraVQbZNswqp/oo72AZnPDbF3jKYp/ZcqS0GyD1Bz8ydapfWi6dV4kFU umDGFDyYe2yuL4nlZYynE8fiVhWS0gMTRVzM3vavooEkWXqjJt5FTwbFeaqWi16S5NkH TabxtTB6U5+OJCwilZONJNIAAUQ5tyLrQEi43WVQcAZ5XIkRqTv+MheCQlxvdssTUN0M zX6f4uGESBqC+zmmb/t2hsGKSsnKzGJExxjq4PLZOO6rlXIm17bKJxWaLdrnlfnFH/f1 AmQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v3si3549277pgr.802.2017.10.15.21.03.04; Sun, 15 Oct 2017 21:03:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750759AbdJPEDD (ORCPT + 6 others); Mon, 16 Oct 2017 00:03:03 -0400 Received: from mx2.suse.de ([195.135.220.15]:57996 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750731AbdJPEBz (ORCPT ); Mon, 16 Oct 2017 00:01:55 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 5DB9AAE8E; Mon, 16 Oct 2017 04:01:54 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Bizon , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 1/5] arm64: dts: realtek: Factor out common RTD129x parts Date: Mon, 16 Oct 2017 06:01:46 +0200 Message-Id: <20171016040150.23400-2-afaerber@suse.de> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171016040150.23400-1-afaerber@suse.de> References: <20171016040150.23400-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Prepares for RTD1293 and RTD1296. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 65 ++-------------------------- arch/arm64/boot/dts/realtek/rtd129x.dtsi | 72 ++++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+), 61 deletions(-) create mode 100644 arch/arm64/boot/dts/realtek/rtd129x.dtsi -- 2.13.6 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index c8b7bb642a9a..8d9ac05d17dc 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -6,19 +6,10 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/memreserve/ 0x0000000000000000 0x0000000000030000; -/memreserve/ 0x000000000001f000 0x0000000000001000; -/memreserve/ 0x0000000000030000 0x00000000000d0000; -/memreserve/ 0x0000000001b00000 0x00000000004be000; -/memreserve/ 0x0000000001ffe000 0x0000000000004000; - -#include +#include "rtd129x.dtsi" / { compatible = "realtek,rtd1295"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; cpus { #address-cells = <2>; @@ -68,12 +59,6 @@ }; }; - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - timer { compatible = "arm,armv8-timer"; interrupts = ; }; +}; - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - /* Exclude up to 2 GiB of RAM */ - ranges = <0x80000000 0x80000000 0x80000000>; - - uart0: serial@98007800 { - compatible = "snps,dw-apb-uart"; - reg = <0x98007800 0x400>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <27000000>; - status = "disabled"; - }; - - uart1: serial@9801b200 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b200 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - status = "disabled"; - }; - - uart2: serial@9801b400 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b400 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - status = "disabled"; - }; - - gic: interrupt-controller@ff011000 { - compatible = "arm,gic-400"; - reg = <0xff011000 0x1000>, - <0xff012000 0x2000>, - <0xff014000 0x2000>, - <0xff016000 0x2000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - }; - }; +&arm_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi new file mode 100644 index 000000000000..b9cb92466fc7 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -0,0 +1,72 @@ +/* + * Realtek RTD1293/RTD1295/RTD1296 SoC + * + * Copyright (c) 2016-2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/memreserve/ 0x0000000000000000 0x0000000000030000; +/memreserve/ 0x000000000001f000 0x0000000000001000; +/memreserve/ 0x0000000000030000 0x00000000000d0000; +/memreserve/ 0x0000000001b00000 0x00000000004be000; +/memreserve/ 0x0000000001ffe000 0x0000000000004000; + +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + arm_pmu: arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + /* Exclude up to 2 GiB of RAM */ + ranges = <0x80000000 0x80000000 0x80000000>; + + uart0: serial@98007800 { + compatible = "snps,dw-apb-uart"; + reg = <0x98007800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + uart1: serial@9801b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x9801b200 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial@9801b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x9801b400 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + gic: interrupt-controller@ff011000 { + compatible = "arm,gic-400"; + reg = <0xff011000 0x1000>, + <0xff012000 0x2000>, + <0xff014000 0x2000>, + <0xff016000 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +};