From patchwork Mon Feb 19 07:35:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 128780 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3208896ljc; Sun, 18 Feb 2018 23:35:57 -0800 (PST) X-Google-Smtp-Source: AH8x226QyUaYMjft9JHgjGJ5K50/OVYnlUlkKEKIU7jSqtqBQZY3tZkl4jHy7uuPzTcy5KvjZ0wA X-Received: by 2002:a17:902:3183:: with SMTP id x3-v6mr13563788plb.290.1519025757699; Sun, 18 Feb 2018 23:35:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519025757; cv=none; d=google.com; s=arc-20160816; b=AvQNo3hlwXZ6/0PAFvErDaVqdb+yt7MHgo3Cv0JazktFIIZMK+4poLgsWSkz3ixA57 YfAYwLsz1N4BWVY+oA06FeHDynuFgGsOwe2iqa4+EDhNx3i+wr1vGaeDH3FsUX9V0O0u hQsfy+VgD8EEGJjzw30XMKDsg4g3Ho77kfFohOh1RBEbIdhtahQa2pfrUZqH+LcMsqMV XWZcEwktiXFDpjJBwBO9mPJOrS9p+47H0MzWP/W9UhPH9gHBY7wt2C86YpR85IXCGV5o DQ09L9Uq9ekktL6JtnWzSTyYcpZ6VfCQfs8M8+IaDAGGrZVgoGxRwrc/oPWBEIcI5vg0 7Fag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=7Xlw5JsiPC+CGOQOEMtzBg8yx3ZpscfS5SFGmephgp8=; b=C2lenyL5ic3pI1TnLzbItxEn/ruf7Xp7FaeEfxNRsyh5YrKCuizzn8mc/oQuvw3c7X wjvk09QapzYvy+uQmTwXtFBGF8u4ToMR9afAVZvZPpvgIHBo+eXaodCohXKAYuirWAa2 Jo64Is7bs6p/ltrfFzuRC0Mp8h5Q973Wev7LxUkqXn6fSb6g0nk34diejdH98so2ttYZ ASKE3Gy3HtBU/Y6kJbcU4heAYsO8bEQi9yLiWF7Rs3eP1fBZVeVF7JUdXQ4Y5p0icKIt 1QoispbxK1wKwzIzN7XMhuUQU6zF2ljLKf53OTiET4RwaSJxDg5vv2OScrWGwfYFq5Xn slbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=Liiov/CO; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a20-v6si5477415plm.683.2018.02.18.23.35.57; Sun, 18 Feb 2018 23:35:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=Liiov/CO; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751531AbeBSHf4 (ORCPT + 6 others); Mon, 19 Feb 2018 02:35:56 -0500 Received: from mail-pf0-f194.google.com ([209.85.192.194]:45687 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751467AbeBSHfz (ORCPT ); Mon, 19 Feb 2018 02:35:55 -0500 Received: by mail-pf0-f194.google.com with SMTP id j24so894156pff.12; Sun, 18 Feb 2018 23:35:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=7gqTF1bgvZmuNSAMp/bukbVmv8u9iZtBgXHxiYm6rgI=; b=Liiov/COoNBbvO/ya6eBPvFiOCgeHiKCjg2IkBBEmeytsaoxjVYq5iTc8gZFZLlM3k eOtg61EBmszHpTJhViL1GYkA9rGQHNFcdWdXwKPAkHpOb77SEm9FzpWpQiF9SIEQEq7R EHA+Gq2QLq+kz35qibWRcUxIQ4L3Up9AwcuTTz47o9pCe9Yf0D+X0/4zcqTD5sAk4+Xo nYOfuQFb3q5U/VFhpuxSaauO6Z9dB7TPAjfz2R40SUniVlXhlWMBY2nCNNV55S/JgRkl FYeMp/VAPv6Cbb86jQ7ixQNV/+t+gksR44zmPLaIGD1SR32PLfTBt+yQkAFX4tGmosCx L3SQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=7gqTF1bgvZmuNSAMp/bukbVmv8u9iZtBgXHxiYm6rgI=; b=s2JsshHezcouyNJBoYZAvEeywdCoTDeatTm8chqo2HaIyI5W4v6KfrIegt2pkX44Bl cN4kIt44UrFG5c9ryS7+PdNvtxsJVJQTPwtEUOYzpXkPbiwcEezHj0w8T1wiKPk8f/AO BbAnOTDJeLBOpBZlWjpDDSYNKwjlzwlDw7rp8asV7EFjauD2IEL2n3xIKGo88WJXbv2S 3Gu+H2oB13c2/0+B5VmrSDmmzjzO9D0uH01gIyCbzVS4asVKfVyHQiNSgLA08IwObexC gWJszLZFGEFOrxWF7CvAsKKUlRYICZMA1l2ZcJAFG4RCEhqAwjAz7/ozvsbKq7mxlEgd DrdA== X-Gm-Message-State: APf1xPASFhNyVBTXZRYVpbWbqJ07hvBvOD2Ozrzg1VA0i8pFrUzDhxk3 naZODjBzS/r0Wu9Sph6vSuc= X-Received: by 10.99.107.200 with SMTP id g191mr11450986pgc.165.1519025754746; Sun, 18 Feb 2018 23:35:54 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id f79sm60524747pfd.103.2018.02.18.23.35.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 18 Feb 2018 23:35:54 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Mon, 19 Feb 2018 18:05:46 +1030 From: Joel Stanley To: Joel Stanley , Andrew Jeffery Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH] ARM: dts: aspeed: Add LPC reset controller node Date: Mon, 19 Feb 2018 18:05:40 +1030 Message-Id: <20180219073540.24520-1-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On both the ast2400 and ast2500 SoCs, the LPC reset controller is required to bring the UARTs out of reset without waiting for the LPC reset to be deasserted. Signed-off-by: Joel Stanley --- Bindings and driver change is under reivew: https://lkml.org/lkml/2018/2/19/12 arch/arm/boot/dts/aspeed-g4.dtsi | 10 ++++++++++ arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 48c28a71ae7e..36ae23aa3b48 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -162,6 +162,7 @@ reg-shift = <2>; interrupts = <9>; clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; + resets = <&lpc_reset 4>; no-loopback-test; status = "disabled"; }; @@ -249,6 +250,12 @@ reg = <0x20 0x24 0x48 0x8>; }; + lpc_reset: reset-controller@18 { + compatible = "aspeed,ast2400-lpc-reset"; + reg = <0x18 0x4>; + #reset-cells = <1>; + }; + ibt: ibt@c0 { compatible = "aspeed,ast2400-ibt-bmc"; reg = <0xc0 0x18>; @@ -264,6 +271,7 @@ reg-shift = <2>; interrupts = <32>; clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; + resets = <&lpc_reset 5>; no-loopback-test; status = "disabled"; }; @@ -274,6 +282,7 @@ reg-shift = <2>; interrupts = <33>; clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; + resets = <&lpc_reset 6>; no-loopback-test; status = "disabled"; }; @@ -284,6 +293,7 @@ reg-shift = <2>; interrupts = <34>; clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; + resets = <&lpc_reset 7>; no-loopback-test; status = "disabled"; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 8eac57c33880..17ee0fa33a14 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -205,6 +205,7 @@ reg-shift = <2>; interrupts = <9>; clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; + resets = <&lpc_reset 4>; no-loopback-test; status = "disabled"; }; @@ -299,6 +300,12 @@ reg = <0x20 0x24 0x48 0x8>; }; + lpc_reset: reset-controller@18 { + compatible = "aspeed,ast2500-lpc-reset"; + reg = <0x18 0x4>; + #reset-cells = <1>; + }; + ibt: ibt@c0 { compatible = "aspeed,ast2500-ibt-bmc"; reg = <0xc0 0x18>; @@ -314,6 +321,7 @@ reg-shift = <2>; interrupts = <32>; clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; + resets = <&lpc_reset 5>; no-loopback-test; status = "disabled"; }; @@ -324,6 +332,7 @@ reg-shift = <2>; interrupts = <33>; clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; + resets = <&lpc_reset 6>; no-loopback-test; status = "disabled"; }; @@ -334,6 +343,7 @@ reg-shift = <2>; interrupts = <34>; clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; + resets = <&lpc_reset 7>; no-loopback-test; status = "disabled"; };