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[209.132.180.67]) by mx.google.com with ESMTP id n11-v6si235287plg.565.2018.03.08.21.15.29; Thu, 08 Mar 2018 21:15:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FvVd9BI3; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751729AbeCIFP0 (ORCPT + 6 others); Fri, 9 Mar 2018 00:15:26 -0500 Received: from mail-pl0-f68.google.com ([209.85.160.68]:38295 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751439AbeCIFPY (ORCPT ); Fri, 9 Mar 2018 00:15:24 -0500 Received: by mail-pl0-f68.google.com with SMTP id m22-v6so4699779pls.5 for ; Thu, 08 Mar 2018 21:15:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kl1gqllUdffTRX6r+Sri999jkRDFobIrAY+7Ow9Ey64=; b=FvVd9BI3FDp2XsSeoAAfTeePIK7QYOmQBnjU/2YE9jl/0y8z8ypkpfTf4zqlPprTDa uaOP9HhaA/ckS+J9en407rSi2iERcCrVHA0tNuHv12IJj8rf4Am9qzUgASBbkTsRvSVW vMBTYuUF9YGkqgxXwycd6vpDIWCfqaqihqFLY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kl1gqllUdffTRX6r+Sri999jkRDFobIrAY+7Ow9Ey64=; b=r7gmY4snGXByUTyKnFrIRiRuJ8cxmWEy7spi/07YisAUgDLLYQF3Uk4h3Pk3lI/H8C 4clhA9TNqoF0Hiv6SF8TBFGR5B3XGjC5RJ+psoDddMMP/zaObF+3yGf3NyjAVkQn/zrS L+7QDWqe7Z2udefdKpUhzAP0x3H/JleshrL7npWbIlsaFTj/Q5fm/vqGdtydqZrG3e2V kwjM5Zc/clb1SwX9nlCKMnSRKd5OPnWkqTquPTg5hB1D0qTOgNkePR/Oq2VAwWBBF492 eJecjt5m4bJkS51rvdIhPPgmVgjWeIL7/2GNurWCXkjsiVAFp3oJlJqzJQrUgyoPYaUl kibg== X-Gm-Message-State: AElRT7FqEo0bKfCbGf5G8lwYd7KhnU2PylaXDeo9nTeTFXPGypJN8t9m d3mwI9mckokFFioRlMI4BXU6 X-Received: by 2002:a17:902:9897:: with SMTP id s23-v6mr14513383plp.105.1520572523894; Thu, 08 Mar 2018 21:15:23 -0800 (PST) Received: from localhost.localdomain ([2405:204:7081:af21:ac40:fc54:f562:4008]) by smtp.gmail.com with ESMTPSA id i186sm635182pfg.25.2018.03.08.21.15.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Mar 2018 21:15:23 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v5 5/9] arm64: dts: actions: Add S900 gpio nodes Date: Fri, 9 Mar 2018 10:43:41 +0530 Message-Id: <20180309051345.1011-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180309051345.1011-1-manivannan.sadhasivam@linaro.org> References: <20180309051345.1011-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 54 +++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi index 0156483f0f4d..69ead8a24b6b 100644 --- a/arch/arm64/boot/dts/actions/s900.dtsi +++ b/arch/arm64/boot/dts/actions/s900.dtsi @@ -180,6 +180,60 @@ clocks = <&cmu CLK_GPIO>; }; + gpioa: gpio@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + ngpios = <32>; + }; + + gpiob: gpio@e01b000c { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b000c 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + ngpios = <32>; + }; + + gpioc: gpio@e01b0018 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0018 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 64 12>; + ngpios = <12>; + }; + + gpiod: gpio@e01b0024 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0024 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 76 30>; + ngpios = <30>; + }; + + gpioe: gpio@e01b0030 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0030 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 106 32>; + ngpios = <32>; + }; + + gpiof: gpio@e01b00f0 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b00f0 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 138 8>; + ngpios = <8>; + }; + timer: timer@e0228000 { compatible = "actions,s900-timer"; reg = <0x0 0xe0228000 0x0 0x8000>;