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[209.132.180.67]) by mx.google.com with ESMTP id i61-v6si38128830plb.138.2018.06.04.23.26.57; Mon, 04 Jun 2018 23:26:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=saLEXrrb; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751417AbeFEG04 (ORCPT + 5 others); Tue, 5 Jun 2018 02:26:56 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:16491 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751049AbeFEG04 (ORCPT ); Tue, 5 Jun 2018 02:26:56 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556Qepm009458; Tue, 5 Jun 2018 01:26:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528180000; bh=mt6jX75ZPXo1+oYJmt5zRprF7kppBYqB1v9Vwq2/PSs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=saLEXrrbkQl0yEK27J52YEQXqYmeSpc4M/QurFPtKz+YOt6winVEGW+QwRr+56JXG xXPrVJOPYpkcqIle3fByNr024i43hydeTpOZ/4nvxtLIU8uz335spd6oaSgn/Yh/iM Rx+gXTyQlK3dlWASc52eNNLUL/KNZbOrQJqDyiRE= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556Qe1h015225; Tue, 5 Jun 2018 01:26:40 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:26:40 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:26:40 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556QeZG023254; Tue, 5 Jun 2018 01:26:40 -0500 From: Nishanth Menon To: Rob Herring , Santosh Shilimkar , Tero Kristo , Nishanth Menon CC: , , Subject: [RFC PATCH 3/3] arm64: dts: ti: k3-am6: Add Device Management Security Controller support Date: Tue, 5 Jun 2018 01:26:40 -0500 Message-ID: <20180605062640.3356-4-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605062640.3356-1-nm@ti.com> References: <20180605062640.3356-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add TISCI compatible System controller for AM6 SoCs. Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am6.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/ti/k3-am6.dtsi b/arch/arm64/boot/dts/ti/k3-am6.dtsi index 07e9cc05519c..898422e24b27 100644 --- a/arch/arm64/boot/dts/ti/k3-am6.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am6.dtsi @@ -97,6 +97,38 @@ interrupts = ; }; + dmsc: dmsc { + compatible = "ti,k2g-sci"; + ti,host-id = <12>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* + * In case of rare platforms that does not use am6 as + * system master, use /delete-property/ + */ + ti,system-reboot-controller; + mbox-names = "rx", "tx"; + + mboxes= <&secure_proxy 11>, + <&secure_proxy 13>; + + k3_pds: power-controller { + compatible = "ti,sci-pm-domain"; + #power-domain-cells = <1>; + }; + + k3_clks: clocks { + compatible = "ti,k2g-sci-clk"; + #clock-cells = <2>; + }; + + k3_reset: reset-controller { + compatible = "ti,sci-reset"; + #reset-cells = <2>; + }; + }; + wkup_uart0: serial@42300000 { compatible = "ti,am654-uart", "ti,omap4-uart", "ns16550a"; reg = <0x0 0x42300000 0x0 0x100>;