From patchwork Thu Feb 7 08:36:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 157682 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp366121jaa; Thu, 7 Feb 2019 00:37:10 -0800 (PST) X-Google-Smtp-Source: AHgI3IYUmWQIvO0gpp0cnglK4VaHxc5i6aQ+KSmep8fFtE4+gXqr8YDo51HFI94V9cFkpZUD85Ij X-Received: by 2002:a17:902:9687:: with SMTP id n7mr14928082plp.94.1549528630018; Thu, 07 Feb 2019 00:37:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549528630; cv=none; d=google.com; s=arc-20160816; b=pD5yzqNJnYtb+VBSGB9dxmPOLHLLeduXJ6mZgRd62MBPT22SKFIO/HaQnV77wfccJA ZPqONC0y+OtrXZEfs+2WHDt/x6w6+5fG8MZcx+uffdp0mlA6KN7qD7kz/uW6HF+Lk8vc YreKDulbT88n+67JN2s+GEoXRlsohKVCFEDg+nM7cvGM1Dpw0loypygFx3qwH224+zYK M2Yyg5Ez3XhUNnWxbz7CGQeSHIgbAU/tYK/LcwRMyLWyz+rWYC1KVrJ7LlFBzQnFQubK YxSDAjYvdJECv68RHyZ7gwF0Qe759vjqdTw8cdbLUdN2vycblUKUqPa/4Ocmmr5dLGsE iqeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Fu6jwA0iS37MvRskgJ23dsfsdPcRAtL3/3qeNzCWH0I=; b=xhlgqekWgVgWJ0cHN4BinfZ+CVZgwizt/yooCjZEZQY+RuhKv+S7FEOVEVTtH/LwML GlOBrBgaS4sTkv19noq67QRAn4q1ue3J9nPftapRvNHNFXnjvLt05jB8v5+3AKZXJnWH rpHc/Txm2tmn5pOEvKNo9nu+HZZRlgzFpDDNk8RsazxL4XoISa4E1JM6LzkPfhu/CE5V nPzLRH6qxmXRgJ+z72rIWVyRKZ/EAAeGVY4KdtTX2QlwR1rsKzxHsPsWAsuoYyTJtuOt 4v0kiuLksXUGNfSx/48xqHP0uCW4Qe6nEzHrV03gGE9iLQ16VYzO+Ls5fTBiTr+z74WI 528w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=blv6a+Ja; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t9si2211259plq.337.2019.02.07.00.37.09; Thu, 07 Feb 2019 00:37:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=blv6a+Ja; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726956AbfBGIhJ (ORCPT + 7 others); Thu, 7 Feb 2019 03:37:09 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:40202 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726889AbfBGIhJ (ORCPT ); Thu, 7 Feb 2019 03:37:09 -0500 Received: by mail-lj1-f194.google.com with SMTP id z25-v6so2040191ljk.7 for ; Thu, 07 Feb 2019 00:37:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Fu6jwA0iS37MvRskgJ23dsfsdPcRAtL3/3qeNzCWH0I=; b=blv6a+JaT9u0qTOXyMuCygUfgEWsVpIgHxI/z/ihQ7gXOdgltzWCubC8R/KQU6F46H Ihcf4Eo95SS/i87l9nbfrPSwkSiWcEqeLrmNmfzi4TN7DE5l3IBWwFAutDcuLYwL9XCE yT8v7CNBTqUJbSYSAU+vzlSepsaNHbWW+vxfN0b+ruS0lArgVc3s/V/EX0kJqYOVlrLR K40UZ9xVlaBfTydt8G9sh9rbM6jF3MrVqdCn3Efm1VRbTzLa7fTsU8dj5OQXHH5d+kIM zJcDiZ9MhaPxDUSkGLCj8LPMdC+FMkIARxDs/yIfL8gbHETiugCd4JKieyQG5VSi6cxi juLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Fu6jwA0iS37MvRskgJ23dsfsdPcRAtL3/3qeNzCWH0I=; b=QRcjpBX+Hs9OvXlYxUhwWJfsXKD0KF9MozLifcRNOuddgj+Pf2pRdL2B3Rg/bndWEI rWr5xBiOg9ERVuhleaAmqC7FTnqgyheNH4lkbpuFqY/vE7d8Z1Njk8AtdDU2LkI3amvk TUEoKW1+Tq/rhiXsgzjQyJxbEgrMWLRmasWnXo4yNNhfKfCKP9VLBchbJRyf/vucoMy2 9EJH1rUBwAgUbL6sQ8bu1x07hx3ML5vwCTAavFaf9y1oe02hTiP+JoDbO9SeSUGN3Zfs hoqFcVYRAZc6pJIP22kF4DI9j2IJefPY8WlxiqYJg6VXq71rcps8NK1Iic3EPrSJhLMA vF8g== X-Gm-Message-State: AHQUAuYqoK7YEM30wUu3MVyoFYPqMdZoBQS+jOfl8dV78B9tgUOki1s/ QY9hTuNJIp2ySP5+BZmGM0Lqpg== X-Received: by 2002:a2e:6503:: with SMTP id z3-v6mr9257434ljb.153.1549528625058; Thu, 07 Feb 2019 00:37:05 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id l72sm470910lfg.75.2019.02.07.00.37.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Feb 2019 00:37:03 -0800 (PST) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Daniel Vetter , David Airlie Cc: linux-arm-kernel@lists.infradead.org, Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 2/4] drm/mcde: Add device tree bindings Date: Thu, 7 Feb 2019 09:36:45 +0100 Message-Id: <20190207083647.20615-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190207083647.20615-1-linus.walleij@linaro.org> References: <20190207083647.20615-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- .../devicetree/bindings/display/ste,mcde.txt | 110 ++++++++++++++++++ 1 file changed, 110 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ste,mcde.txt -- 2.20.1 diff --git a/Documentation/devicetree/bindings/display/ste,mcde.txt b/Documentation/devicetree/bindings/display/ste,mcde.txt new file mode 100644 index 000000000000..fc58aa5effb5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ste,mcde.txt @@ -0,0 +1,110 @@ +ST-Ericsson Multi Channel Display Engine MCDE + +The ST-Ericsson MCDE is a display controller with support for compositing +and displaying several channels memory resident graphics data on DSI or +LCD displays or bridges. It is used in the ST-Ericsson U8500 platform. + +Required properties: + +- compatible: must be: + "ste,mcde" +- reg: register base for the main MCDE control registers, should be + 0x1000 in size +- interrupts: the interrupt line for the MCDE +- epod-supply: a phandle to the EPOD regulator +- vana-supply: a phandle to the analog voltage regulator +- clocks: an array of the MCDE clocks in this strict order: + MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI + (HDMI clock), DSI0ESCLK (DSI0 energy save clock), + DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy + save clock) +- clock-names: must be the following array: + "mcde", "lcd", "hdmi", "dsi0", "dsi1", "dsi0es", "dsi1es", "dsi2es" + to match the required clock inputs above. +- #address-cells: should be <1> (for the DSI hosts that will be children) +- #size-cells: should be <1> (for the DSI hosts that will be children) +- ranges: this should always be stated + +Required subnodes: + +The devicetree must specify subnodes for the DSI host adapters. +These must have the following characteristics: + +- compatible: must be: + "ste,mcde-dsi" +- reg: must specify the register range for the DSI host +- vana-supply: phandle to the VANA voltage regulator +- #address-cells: should be <1> +- #size-cells: should be <0> + +Display panels and bridges will appear as children on the DSI hosts, and +the displays are connected to the DSI hosts using the common binding +for video transmitter interfaces; see +Documentation/devicetree/bindings/media/video-interfaces.txt + +If a DSI host is unused (not connected) it will have no children or ports +defined. + +Example: + +mcde@a0350000 { + compatible = "ste,mcde"; + reg = <0xa0350000 0x1000>; + interrupts = ; + epod-supply = <&db8500_b2r2_mcde_reg>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */ + <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */ + <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */ + <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */ + <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */ + <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */ + <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */ + <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */ + clock-names = "mcde", "lcd", "hdmi", "dsi0", "dsi1", + "dsi0es", "dsi1es", "dsi2es"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dsi0: dsi@a0351000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0351000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + #address-cells = <1>; + #size-cells = <0>; + port { + dsi0_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + + panel: display { + compatible = "samsung,s6d16d0"; + reg = <0>; + vdd1-supply = <&ab8500_ldo_aux1_reg>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + + }; + dsi1: dsi@a0352000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0352000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + #address-cells = <1>; + #size-cells = <0>; + }; + dsi2: dsi@a0353000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0353000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + #address-cells = <1>; + #size-cells = <0>; + }; +};