From patchwork Thu Mar 28 14:25:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 161312 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp781445jan; Thu, 28 Mar 2019 07:25:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3RGgDwo4SaUglha1DAE4UjczFeUNvGNvZH4k/rjveiGrt8AE1fjknst1EU4J+ylwwD1oP X-Received: by 2002:a63:3d49:: with SMTP id k70mr23435257pga.447.1553783129986; Thu, 28 Mar 2019 07:25:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553783129; cv=none; d=google.com; s=arc-20160816; b=w6SHtHHKbuSJBiYJH4b0o+O7bmIqtWNN8nuEzi5hdygwUtb0/gyt9imsYWR3QC86Xj SrdNKc2AGOR4WnI7Bms6ec4lt6+Gk3hLb2bUvg+t/7Ss8KSmAE8V2zmh31OkDQr0xoqL zmweaizfhnDzPhAHSdln5cRw79wAAu6PZL5czyeHabxLgyDmaRanfA1rDFrnKXe6Qbho YRWaO1OxwSLOd5QDXQnjofpYl9/xsgFeR9OuqpJeSGOmcFfTnuYvJZxHaO+3WhMTX6z6 AEpgGlXzUlACxYPxMr2rE2CBwO607RjbLIKf/vokUwYWw0N4ct7C8lWz+e/lyPhKze4K WZjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Km9F0+MNLg3bsKJa/pUludwKxgF0kSDjShLunfY0CCM=; b=FWW7VnKQ5yv/xNuYpx+dtJHWcR9CXDrsCiR7NF6GQsF9Dup7SLUqluVm1h4p0bv/N1 XmWmSdHPwJCDoIqouquh6aZ0eCdPY+6Af8d8EZTtoVxgDPQMEsqpNxwJ89YZYcCKFdFo eK0wIq9zQATCbFUnu3bY0haEks2v3xn6dvv89Lmm3I8u2e+V6hUDv0ZzY+sM3qV+6d3T EchiapB27wvruQkvjIIfemvNK+DpHMzhpzc1B0HNBxNJOpk3RFOMshHVsXnYTmOV9pZd Tsc/bItm/2NdZ+5Qc/PJQUcZClwEuWqn7clSB0ETVTU5rf+1n3f5s6AjrtK2wIv4FRdD amXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Jtvc6iiF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g6si20730742pgs.236.2019.03.28.07.25.29; Thu, 28 Mar 2019 07:25:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Jtvc6iiF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726171AbfC1OZ3 (ORCPT + 7 others); Thu, 28 Mar 2019 10:25:29 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:37404 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725875AbfC1OZ3 (ORCPT ); Thu, 28 Mar 2019 10:25:29 -0400 Received: by mail-wm1-f67.google.com with SMTP id v14so4271589wmf.2 for ; Thu, 28 Mar 2019 07:25:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Km9F0+MNLg3bsKJa/pUludwKxgF0kSDjShLunfY0CCM=; b=Jtvc6iiFdV72OJjFdA9kTV/bTYRIw9o+r+qMl/Hl34wqMf62Ux+Ew+12W0AJaON5bJ DWEjguYdOqBAmyPd2965w+vmJCRlBK/89M29vEBB/YHBFt9axmztDS+tpVJ8MoXY+GjW xc+uNc0CeLcHzxnVf9lqG0h8CT3j6EoT7ZEo7ntCP7rFGgwS7othCvsCiilWGFvUQOTE hKY9MHmJI5Cdnlrerrpo85KTw5GCGhBeaIxRDMxGJ/gyiVPbVT0dE84V0E3WEkW6IiF0 nEJ+9fe/DEbh+66fME8cEf9SfjtCb4s51pEM3yhf4wPKle1wUQqpxSjia82hmkLyNc6h gu7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Km9F0+MNLg3bsKJa/pUludwKxgF0kSDjShLunfY0CCM=; b=nNXc+ymWkZXaiTKTnKB4HLUyHp06FC29wjcjWFGPH9nOGbdBbEuZL5yjJh5K82Iyl7 2j/rm8b8eGz5CevSCooIQc3TGf1wqhUxGPT0Au9wu9hOb900F6vS+Cq2kS9yME/5EF/2 sNrrDUll4ShFGg3DvP8ESjP7hME77E1qDFZr+UIoW2jHOWBP/CpstEf1Avq+CLCI/hCv aIYmvufVFweeWQ2XJgHPCPLFePIV22KCwu4usTfeyq8YT5VCZ7rkF4f+QMxvtIWptFs6 IyuUjnaxyN9JAGTBcTNNhkYKnrxmU8YdeVPBUBfePWxG7RSdY/0VtH3okyEpg1GoCmiH 93CA== X-Gm-Message-State: APjAAAX9p9khg7B7HXmatbwsoPygZ/zY5h0YeQ1MLeuXZvmKEAvJhjhk vUBNYlBzJLIOv7uPH2o/MBAgqQ== X-Received: by 2002:a7b:c404:: with SMTP id k4mr162788wmi.117.1553783127660; Thu, 28 Mar 2019 07:25:27 -0700 (PDT) Received: from arch-late.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:27 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva , Philipp Zabel Subject: [PATCH v3 2/5] ARM: dts: imx7s: add multiplexer controls Date: Thu, 28 Mar 2019 14:25:13 +0000 Message-Id: <20190328142516.30372-3-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva Reviewed-by: Philipp Zabel --- arch/arm/boot/dts/imx7s.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 9a680d3d6424..792efcd2caa1 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -497,8 +497,15 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", + "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <0>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 {