From patchwork Thu Sep 12 11:39:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 173697 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp2003991ilq; Thu, 12 Sep 2019 04:39:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNKln4LbMDCdrxg3M0HkyYuE6zWgx8nudgrhjgKL8FL5zEH/oaXC/cO1eeQwpx/m/YUHDd X-Received: by 2002:a17:906:c669:: with SMTP id ew9mr33828810ejb.285.1568288396202; Thu, 12 Sep 2019 04:39:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568288396; cv=none; d=google.com; s=arc-20160816; b=FpcSTqGGpgYQaETbNbL+EnPwvagH9fYwiuOLGP1O6jAyYIXV3Wt9OpfxTY3xVp0qra wSiE8NpV3LvwkAuJtE1dCGJPswoNmzjZJBESImuVS0ttomwJE0PnXoVlEq1CBBL2WitF i4qBfygNFjGB7BkKlr1rTK3DmLP8XOr143tfaBueHiG2x1xFs1pZGU+vzHXs0AA5Btra Idm3ygAFjyp706MxHVLCOIr5/7hYQgWKSD7tEj5Qg8hHM08VpvzuTGl5h8W8G9L5iq7Y Es92w+A086ai+jmzoK/Xzsr5XO/NzqyA0nS5zrpZx59HFSVmPqikgcoQvBRJlxpSAaYh Q2cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=YLleoDeFe+/39hjFYAaiNlP+EU5/AACmJxmEmj1xr2o=; b=QsW6VJXBmvAutW8sYeNt8SdIKLgCZzbwamn5jVkQHBYz1mHHwSkh6OGgmJKlskfjzk ooCdmP2u/oxJzkAMtS5nvjVOmV7QPBrCNitB9DPx3mowojU12T9+SAOVUfve7qXbRyNb vvzcvAm7nBATUnIL6ablbNjvK+31KMvG4vCcIrDp7Gwd3EDfscZ/W8kaPfDtHFmoQNcK g9Uh3o6GVFUJrg7kP6E/i3NklTsz6TawqrIEqDr9FsZ0RVezwrCM3doJrrK3D/U3yUZY UlDUuZI6feV/ZHIfSwZxelzyu6PgrJrWOkL8/TmqoDb5KjQz3RL0VRnm/JxKyldfGqEZ 2AiA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=UKfYta98; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c12si14652476edb.394.2019.09.12.04.39.55; Thu, 12 Sep 2019 04:39:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=UKfYta98; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731427AbfILLjx (ORCPT + 8 others); Thu, 12 Sep 2019 07:39:53 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:48336 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731375AbfILLjx (ORCPT ); Thu, 12 Sep 2019 07:39:53 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8CBdkfr116608; Thu, 12 Sep 2019 06:39:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568288386; bh=YLleoDeFe+/39hjFYAaiNlP+EU5/AACmJxmEmj1xr2o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=UKfYta98/Cb+jehL2iHDW+IaIaAYBTcg4S3XxUVBitRtIWUsnJQnZAArtgGPcKQO+ ogYND/kzWQKNLTTVX/Z9pGz8K1AwX0DfdvS+YZtE55gzMIg8ztgscClffOxcasqJt3 HQ+iNT6ltMRrf2zVNxm/PMfXKqZ8J02UIVkBW+2g= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8CBdkwk050898 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 12 Sep 2019 06:39:46 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 12 Sep 2019 06:39:46 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 12 Sep 2019 06:39:46 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8CBdKd1120606; Thu, 12 Sep 2019 06:39:44 -0500 From: Tero Kristo To: , , , , , CC: , Subject: [PATCHv5 10/10] ARM: OMAP2+: pdata-quirks: add PRM data for reset support Date: Thu, 12 Sep 2019 14:39:16 +0300 Message-ID: <20190912113916.20093-11-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190912113916.20093-1-t-kristo@ti.com> References: <20190912113916.20093-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The parent clockdomain for reset must be in force wakeup mode, otherwise the reset may never complete. Add pdata quirks for this purpose for PRM driver. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/pdata-quirks.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 6c6f8fce854e..4730f8c0cb0e 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "clockdomain.h" #include "common.h" @@ -565,6 +566,12 @@ void omap_pcs_legacy_init(int irq, void (*rearm)(void)) pcs_pdata.rearm = rearm; } +static struct ti_prm_platform_data ti_prm_pdata = { + .clkdm_deny_idle = clkdm_deny_idle, + .clkdm_allow_idle = clkdm_allow_idle, + .clkdm_lookup = clkdm_lookup, +}; + /* * GPIOs for TWL are initialized by the I2C bus and need custom * handing until DSS has device tree bindings. @@ -664,6 +671,11 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = { /* Common auxdata */ OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata), OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata), + OF_DEV_AUXDATA("ti,omap4-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,omap5-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,dra7-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,am3-prm-inst", 0, NULL, &ti_prm_pdata), + OF_DEV_AUXDATA("ti,am4-prm-inst", 0, NULL, &ti_prm_pdata), { /* sentinel */ }, };