From patchwork Sun Oct 20 15:36:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 176989 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2250476ill; Sun, 20 Oct 2019 08:36:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqyvN0Tuv9MF5jyZ7CFAXvmUuAp00/K8Quc2HMiNZdSWI6X4lc3NEoV5KLRPXe6edF3KNazn X-Received: by 2002:a50:a227:: with SMTP id 36mr8292243edl.262.1571585788110; Sun, 20 Oct 2019 08:36:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571585788; cv=none; d=google.com; s=arc-20160816; b=vx9axKpy8dNMRT6oSD9TOaRf7GhnKsxe4+wlOa1IhxlTXIHOX2iRVLc0rpCAzBHJw9 /n9IYGtdOKmKZI65skx2gCKZp8RPfvVHW0XrvnY1ahXIwk+dtUi2l4Rnj+zFdXboHZna P39BGgcJ6kUu2oPeEcCmsxPVWsbwB45byAGPR1+gWtSD8DcfYfpJFxHODrjJaGKohu+q uKaCM1uSvpGTCpQmQRPi8B8ajtmLQOyRnS+9HkccA61LzIzhzw1i/AZG6q1rM9y2ebdd QaeazdvfDKk+DQEegeVWBh1WT78MWcZGBKDw6uIzohsBWX/zGlfsgDDfwOnuYEA97Wqq IECg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4Dd4JnQ9jpuRmRSTULYFt4DjDiZ4nHIHKv6XTUAVumE=; b=zxcO8jDa8LQxr4nu31THlp7dHngDNggBEsIK1VAyQN3dYGw9kersM94ZDzezLt4v6D 8wUSkELoe3mUGvGi2JN3yT3SavwAfFRE4O3TMZYZX7gA+wO9f+91ZoMNScbX/wONia4U q79BUff8CJDMWwrYDF0K9cESwxpSU9mEd9wPh0Oq39131Uh0lvvKVnwRYPc2FnUEHdip 2lxa16KTYksaGhX4lO81RhPV3edje+U1q+I+g+0bwRovdIJWcFesad85rXKmmq/SMs/P wdTzCtvIqXjRjj5SAxdckiXvyt8P5z43RKEMf5KJ2WEfDPSWkZ2ffgCoX5nIpL+dTPJY lZLA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o7si7825061edc.342.2019.10.20.08.36.27; Sun, 20 Oct 2019 08:36:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726495AbfJTPgY (ORCPT + 8 others); Sun, 20 Oct 2019 11:36:24 -0400 Received: from mx2.suse.de ([195.135.220.15]:42548 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726482AbfJTPgY (ORCPT ); Sun, 20 Oct 2019 11:36:24 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 69453AE35; Sun, 20 Oct 2019 15:36:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] arm64: dts: realtek: Add oscillator for RTD129x Date: Sun, 20 Oct 2019 17:36:11 +0200 Message-Id: <20191020153612.29889-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191020153612.29889-1-afaerber@suse.de> References: <20191020153612.29889-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add 27 MHz oscillator clock node. Signed-off-by: Andreas Färber --- v3: New (from previously blocking clk patch series) arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index a26c375ee1bb..4fb16611159b 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -23,6 +23,13 @@ interrupts = ; }; + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + #clock-cells = <0>; + clock-output-names = "osc27M"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>;