From patchwork Tue Nov 19 02:19:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179625 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2692ilf; Mon, 18 Nov 2019 18:19:35 -0800 (PST) X-Google-Smtp-Source: APXvYqxDrBKGmGLbOHvgfy31ee3MIppMQR1r2oF39KK+gl9f+aBa0rd6r7us9M9svxUYNbIkwgXT X-Received: by 2002:a17:906:b74c:: with SMTP id fx12mr29894988ejb.324.1574129975676; Mon, 18 Nov 2019 18:19:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574129975; cv=none; d=google.com; s=arc-20160816; b=RL5T1mta52WbrHFG0VZc8Y/n8nho0hqmy7+jrW+0NcDOVJMnAkB7vfcmIF6WetkyVL EGoyEzilxw5sS+HrBQ64zDaDi7DEGVCDGb8j0tMYBoZTtDEkMSfhf+4QB+X2VXaUpf8u vGMlYrtArUjtXw90YA80gfTYWD0PMPWsQVN5SCyyMOKAcraHd2s0YtW/GFwz2gte67VS RUO7Bvci6NLBaGYflHAbkipK3KfVcsC1rFbeUU41MojAJAiS2EUa8lTs8JtVkPZ12Qnm gUSED1qqABZl45jxWw1ptms3NpbT2Pdhzl9CvcK5vAGotrAF7VNXLBglUXyQc1b7Qhf/ bN/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=gtJOQOPdD1dk9lG3qUN53LxDXbiGWToFm1h1HWdjZwo=; b=wJmXAHBENE9F5+8EW3hixh0YQIAO5crraTnvp7teP9HlWiP/PQEZvg4fn3KJaOK6Tg E687PvyrFIk6C1ifoqJevgT8B9EFUwilopSBquF6ZfG7ilbZCjEaVEEOcBvItVuGZV+b l60VAGmmcNQawTuwBlw6xDPcoCX+6XpexGPsFArrobKdSXSmO21+fivjNREPZORmzpbI vLZhdEpvR0suhXagxdACKK1sdUYA8Va4ZBxTmyR3ylloKpxFqiKrcFHqmLIkwJBt+zaU xyB0dSvGGAKRc1ndBc85hm4BsYbcEwZ5jNTh6t1Bb2LAIJKRogxIzGFFIB3sF9Rbtdm/ TK1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z10si13018867ejr.262.2019.11.18.18.19.35; Mon, 18 Nov 2019 18:19:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726983AbfKSCTe (ORCPT + 8 others); Mon, 18 Nov 2019 21:19:34 -0500 Received: from mx2.suse.de ([195.135.220.15]:58068 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727336AbfKSCT1 (ORCPT ); Mon, 18 Nov 2019 21:19:27 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 7B32AB336; Tue, 19 Nov 2019 02:19:25 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 8/8] arm64: dts: realtek: rtd139x: Add irq muxes and UART interrupts Date: Tue, 19 Nov 2019 03:19:17 +0100 Message-Id: <20191119021917.15917-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191119021917.15917-1-afaerber@suse.de> References: <20191119021917.15917-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add iso and misc IRQ mux DT nodes for Realtek RTD1395 SoC. Update the UART DT nodes with interrupts from these muxes, so that UART0 can be used without earlycon. Signed-off-by: Andreas Färber --- v4: New arch/arm64/boot/dts/realtek/rtd139x.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd139x.dtsi b/arch/arm64/boot/dts/realtek/rtd139x.dtsi index 706da12f9ea3..f53cb8a5083b 100644 --- a/arch/arm64/boot/dts/realtek/rtd139x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd139x.dtsi @@ -84,6 +84,14 @@ #reset-cells = <1>; }; + iso_irq_mux: interrupt-controller@7000 { + compatible = "realtek,rtd1395-iso-irq-mux"; + reg = <0x7000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + iso_reset: reset-controller@7088 { compatible = "snps,dw-low-reset"; reg = <0x7088 0x4>; @@ -103,6 +111,8 @@ reg-io-width = <4>; clock-frequency = <27000000>; resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; + interrupt-parent = <&iso_irq_mux>; + interrupts = <2>; status = "disabled"; }; @@ -111,6 +121,14 @@ reg = <0x1a200 0x8>; }; + misc_irq_mux: interrupt-controller@1b000 { + compatible = "realtek,rtd1395-misc-irq-mux"; + reg = <0x1b000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + uart1: serial@1b200 { compatible = "snps,dw-apb-uart"; reg = <0x1b200 0x100>; @@ -118,6 +136,8 @@ reg-io-width = <4>; clock-frequency = <432000000>; resets = <&reset2 RTD1295_RSTN_UR1>; + interrupt-parent = <&misc_irq_mux>; + interrupts = <3>; status = "disabled"; }; @@ -128,6 +148,8 @@ reg-io-width = <4>; clock-frequency = <432000000>; resets = <&reset2 RTD1295_RSTN_UR2>; + interrupt-parent = <&misc_irq_mux>; + interrupts = <8>; status = "disabled"; }; };