From patchwork Tue Feb 25 09:40:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 204269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14D5BC35DFB for ; Tue, 25 Feb 2020 09:41:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DCFC620656 for ; Tue, 25 Feb 2020 09:41:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oMujGb3S" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729813AbgBYJlZ (ORCPT ); Tue, 25 Feb 2020 04:41:25 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:49611 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729707AbgBYJlZ (ORCPT ); Tue, 25 Feb 2020 04:41:25 -0500 X-UUID: 29c493f77eea43f5958fb16f68d95ec7-20200225 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=SptAmWhGbMwpUwsCfcOQSGD+SPMchRZi0lvDOYYWsPs=; b=oMujGb3SSyeBTq1Ju5J+J1iJzTvOz4kFpAfvgeVSKWNPMhLdvuVWekW9KkJKaex53FFwhkDgqPvHOT+oOZPwQV+yh1uUUwds3huZ1BMif0awKq8gMHEKEwDIRmQDUFRBz3iXxH/3xvu+gxl1tARjcndRz8lh8GNVf2Bsjy5TevY=; X-UUID: 29c493f77eea43f5958fb16f68d95ec7-20200225 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 20334467; Tue, 25 Feb 2020 17:41:13 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 25 Feb 2020 17:39:52 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (10.16.6.18) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 25 Feb 2020 17:39:52 +0800 From: Jitao Shi To: Rob Herring , Mark Rutland , Matthias Brugger , Daniel Vetter , David Airlie , , CC: , , , , , , , , , , , Jitao Shi Subject: [PATCH v8 6/7] drm/mediatek: add mt8183 dpi clock factor Date: Tue, 25 Feb 2020 17:40:56 +0800 Message-ID: <20200225094057.120144-7-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20200225094057.120144-1-jitao.shi@mediatek.com> References: <20200225094057.120144-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 0E7A7AB6CDEEC6653FCE6FDD180565FA6D554792D1548249266DF4F8E4C2FF9A2000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The factor depends on the divider of DPI in MT8183, therefore, we should fix this factor to the right and new one. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dpi.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.21.0 diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index df598f87a40f..db3272f7a4c4 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -676,6 +676,16 @@ static unsigned int mt2701_calculate_factor(int clock) return 1; } +static unsigned int mt8183_calculate_factor(int clock) +{ + if (clock <= 27000) + return 8; + else if (clock <= 167000) + return 4; + else + return 2; +} + static const struct mtk_dpi_conf mt8173_conf = { .cal_factor = mt8173_calculate_factor, .reg_h_fre_con = 0xe0, @@ -687,6 +697,11 @@ static const struct mtk_dpi_conf mt2701_conf = { .edge_sel_en = true, }; +static const struct mtk_dpi_conf mt8183_conf = { + .cal_factor = mt8183_calculate_factor, + .reg_h_fre_con = 0xe0, +}; + static int mtk_dpi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -784,6 +799,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt8173-dpi", .data = &mt8173_conf, }, + { .compatible = "mediatek,mt8183-dpi", + .data = &mt8183_conf, + }, { }, };