From patchwork Fri Feb 28 05:21:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 204078 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6172C3F2CF for ; Fri, 28 Feb 2020 05:22:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACAE8246A6 for ; Fri, 28 Feb 2020 05:22:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="OibC/kNL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725468AbgB1FWu (ORCPT ); Fri, 28 Feb 2020 00:22:50 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:4369 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725794AbgB1FWt (ORCPT ); Fri, 28 Feb 2020 00:22:49 -0500 X-UUID: 7992e77d8a314341972fcad71c0e8d02-20200228 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=5cFcI6oejfKgvdPigAG7lz/WkjQ0ZoTObgew3f2ti/4=; b=OibC/kNLmJADxfO+OC3xFgDxQ9MEV87pexgsFFSwGCPEefpRNpI7TRiY5Lt4/dbV3v/8tHmLDKeV6cV3OZAqN2A8NUM6Rv9ykEpjLBzn5ZSOaK4JHs4lqTcky0ACpmq4W5mL4Wu/9hnXCLhCy0TTmKxsa0s3oy+xLXv5Nj6hNnA=; X-UUID: 7992e77d8a314341972fcad71c0e8d02-20200228 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1474536278; Fri, 28 Feb 2020 13:21:44 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33N2.mediatek.inc (172.27.4.76) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 28 Feb 2020 13:22:18 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (10.16.6.18) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 28 Feb 2020 13:22:07 +0800 From: Jitao Shi To: Rob Herring , Mark Rutland , Matthias Brugger , Daniel Vetter , David Airlie , , CC: , , , , , , , , , , , Jitao Shi Subject: [PATCH v10 5/5] drm/mediatek: set dpi pin mode to gpio low to avoid leakage current Date: Fri, 28 Feb 2020 13:21:28 +0800 Message-ID: <20200228052128.82136-6-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20200228052128.82136-1-jitao.shi@mediatek.com> References: <20200228052128.82136-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: F98AB8D0A87863EFA2C70BBE779F1DEAF0C572D9FECD78516D03F7B0CB365BA02000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Config dpi pins mode to output and pull low when dpi is disabled. Aovid leakage current from some dpi pins (Hsync Vsync DE ... ). Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 31 ++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) -- 2.21.0 diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index db3272f7a4c4..0133ad8f6a7d 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -10,7 +10,9 @@ #include #include #include +#include #include +#include #include #include @@ -74,6 +76,9 @@ struct mtk_dpi { enum mtk_dpi_out_yc_map yc_map; enum mtk_dpi_out_bit_num bit_num; enum mtk_dpi_out_channel_swap channel_swap; + struct pinctrl *pinctrl; + struct pinctrl_state *pins_gpio; + struct pinctrl_state *pins_dpi; int refcount; u32 pclk_sample; }; @@ -387,6 +392,9 @@ static void mtk_dpi_power_off(struct mtk_dpi *dpi) if (--dpi->refcount != 0) return; + if (dpi->pinctrl && dpi->pins_gpio) + pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio); + mtk_dpi_disable(dpi); clk_disable_unprepare(dpi->pixel_clk); clk_disable_unprepare(dpi->engine_clk); @@ -411,6 +419,9 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) goto err_pixel; } + if (dpi->pinctrl && dpi->pins_dpi) + pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi); + mtk_dpi_enable(dpi); return 0; @@ -719,6 +730,26 @@ static int mtk_dpi_probe(struct platform_device *pdev) of_property_read_u32_index(dev->of_node, "pclk-sample", 1, &dpi->pclk_sample); + dpi->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(dpi->pinctrl)) { + dpi->pinctrl = NULL; + dev_dbg(&pdev->dev, "Cannot find pinctrl!\n"); + } + if (dpi->pinctrl) { + dpi->pins_gpio = pinctrl_lookup_state(dpi->pinctrl, "idle"); + if (IS_ERR(dpi->pins_gpio)) { + dpi->pins_gpio = NULL; + dev_dbg(&pdev->dev, "Cannot find pinctrl idle!\n"); + } + if (dpi->pins_gpio) + pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio); + + dpi->pins_dpi = pinctrl_lookup_state(dpi->pinctrl, "active"); + if (IS_ERR(dpi->pins_dpi)) { + dpi->pins_dpi = NULL; + dev_dbg(&pdev->dev, "Cannot find pinctrl active!\n"); + } + } mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); dpi->regs = devm_ioremap_resource(dev, mem); if (IS_ERR(dpi->regs)) {