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[79.53.232.203]) by smtp.googlemail.com with ESMTPSA id n10sm2006475edf.3.2020.03.30.13.56.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Mar 2020 13:56:56 -0700 (PDT) From: Ansuel Smith To: Andy Gross Cc: Ansuel Smith , Mathieu Olivari , Bjorn Andersson , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v2] ARM: qcom: Disable i2c device on gsbi4 for ipq806x Date: Mon, 30 Mar 2020 22:56:46 +0200 Message-Id: <20200330205647.24806-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Disable the i2c device on gsbi4, mark gsbi4_h as unused and gsbi4_qup and src clks as protected. gsbi4_h can't be set to protected as it's used by both gsbi and rpm and making it protected creates some problem with gsbi4 uart function. Without this fix, clock framework will turn them off at end of probe. On ipq806x by design gsbi4_qup, gsbi4_h clks and i2c on gsbi4 are meant for RPM usage. So turning them off in kernel is incorrect. Signed-off-by: Mathieu Olivari Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 9 --------- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ drivers/clk/qcom/gcc-ipq806x.c | 1 + 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index 554c65e7aa0e..580aec63030d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -21,14 +21,5 @@ mux { }; }; }; - - gsbi@16300000 { - i2c@16380000 { - status = "ok"; - clock-frequency = <200000>; - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; }; }; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 16c0da97932c..d9a803c8a59b 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -421,6 +421,9 @@ qcom,ssbi@500000 { gcc: clock-controller@900000 { compatible = "qcom,gcc-ipq8064"; reg = <0x00900000 0x4000>; + + protected-clocks = , ; + #clock-cells = <1>; #reset-cells = <1>; }; diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index b0eee0903807..f7d7a2bc84c1 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -991,6 +991,7 @@ static struct clk_branch gsbi4_h_clk = { .hw.init = &(struct clk_init_data){ .name = "gsbi4_h_clk", .ops = &clk_branch_ops, + .flags = CLK_IGNORE_UNUSED, }, }, };