From patchwork Tue Mar 31 08:31:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 202611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AE6BC2D0EE for ; Tue, 31 Mar 2020 08:32:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 49DFB20787 for ; Tue, 31 Mar 2020 08:32:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="h3Vg+Wm4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726528AbgCaIcW (ORCPT ); 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Tue, 31 Mar 2020 10:32:05 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8375F100034; Tue, 31 Mar 2020 10:32:01 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 73F0621E677; Tue, 31 Mar 2020 10:32:01 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 31 Mar 2020 10:32:00 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [PATCH v5 1/6] dt-bindings: mfd: Document STM32 low power timer bindings Date: Tue, 31 Mar 2020 10:31:41 +0200 Message-ID: <20200331083146.10462-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200331083146.10462-1-benjamin.gaignard@st.com> References: <20200331083146.10462-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-03-31_03:2020-03-30,2020-03-31 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a subnode to STM low power timer bindings to support timer driver Signed-off-by: Benjamin Gaignard --- version 5: - the previous has been acked-by Rob but since I have docummented interrupts and interrupt-names properties I haven't applied it here. version 4: - change compatible and subnode names - document wakeup-source property .../devicetree/bindings/mfd/st,stm32-lptimer.yaml | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index 1a4cc5f3fb33..2809c4a186c4 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -33,12 +33,28 @@ properties: items: - const: mux + interrupts: + items: + - description: timer event interrupt + - description: wake up interrupt + minItems: 1 + maxItems: 2 + + interrupt-names: + items: + - const: event + - const: wakeup + minItems: 1 + maxItems: 2 + "#address-cells": const: 1 "#size-cells": const: 0 + wakeup-source: true + pwm: type: object @@ -81,6 +97,16 @@ patternProperties: required: - compatible + timer: + type: object + + properties: + compatible: + const: st,stm32-lptimer-timer + + required: + - compatible + required: - "#address-cells" - "#size-cells" @@ -94,11 +120,15 @@ additionalProperties: false examples: - | #include + #include timer@40002400 { compatible = "st,stm32-lptimer"; reg = <0x40002400 0x400>; clocks = <&timer_clk>; clock-names = "mux"; + interrupt-names = "event", "wakeup"; + interrupts-extended = <&intc GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, + <&exti 47 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -115,6 +145,10 @@ examples: counter { compatible = "st,stm32-lptimer-counter"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + }; }; ...