From patchwork Tue Aug 18 14:55:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Prakash Ranjan X-Patchwork-Id: 253644 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D32EC433DF for ; Tue, 18 Aug 2020 14:55:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B65F207D3 for ; Tue, 18 Aug 2020 14:55:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="TLlcNKeu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726145AbgHROzz (ORCPT ); Tue, 18 Aug 2020 10:55:55 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:38184 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726671AbgHROzy (ORCPT ); Tue, 18 Aug 2020 10:55:54 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597762554; h=Content-Transfer-Encoding: MIME-Version: Message-Id: Date: Subject: Cc: To: From: Sender; bh=h7ieTAL6x5VkB6Wo/SxyyyfFM+5x9d9kB7SA6qlVaG0=; b=TLlcNKeuyA8mBrcnQzkCNCXGvVinbQD/fiKrkeiZSne9YJhI2ojI0JeIHGw9UE0WLGmuvWi7 Hxs2F2iGayW5lHRB9xIwwySKBY/+4CSKcHB0rPWtBtilYuV+Y8u789pz3wN6xpyUFoBD02rc pVcRypjTjFJP9Wmuc7S61Dl4psA= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-west-2.postgun.com with SMTP id 5f3bebe02889723bf845c373 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 18 Aug 2020 14:55:28 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 616A0C43387; Tue, 18 Aug 2020 14:55:28 +0000 (UTC) Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4FD5DC433CA; Tue, 18 Aug 2020 14:55:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4FD5DC433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Andy Gross , Bjorn Andersson , Douglas Anderson , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sai Prakash Ranjan Subject: [PATCHv2] arm64: dts: qcom: sc7180: Fix the LLCC base register size Date: Tue, 18 Aug 2020 20:25:14 +0530 Message-Id: <20200818145514.16262-1-saiprakash.ranjan@codeaurora.org> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is one LLCC logical bank(LLCC0) on SC7180 SoC and the size of the LLCC0 base is 0x50000(320KB) not 2MB, so correct the size and fix copy paste mistake carried over from SDM845. Fixes: 7cee5c742899 ("arm64: dts: qcom: sc7180: Fix node order") Fixes: c831fa299996 ("arm64: dts: qcom: sc7180: Add Last level cache controller node") Signed-off-by: Sai Prakash Ranjan --- Changes in v2: * Edit commit msg to remove confusing references (Doug). --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index d46b3833e52f..e875f6c3b663 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2618,7 +2618,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sc7180-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; + reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; interrupts = ; };