From patchwork Sat Sep 5 17:29:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 249180 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp2420977ilg; Sat, 5 Sep 2020 10:33:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx/QQBpeavJB1RNycYpuS6S78tz5G/8AJzO/oBsMq0b/hW5PDe/eVsFu6GM3IRhaXNu6D3B X-Received: by 2002:aa7:dc16:: with SMTP id b22mr14064970edu.252.1599327194018; Sat, 05 Sep 2020 10:33:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599327194; cv=none; d=google.com; s=arc-20160816; b=aa576DhCaVAMRPnfksFhFlafJwcdIJalnIHvV5DcHIS0YjlaEfR8YUDIZCEG/XZeGX RGCbDhWAGriibTar1Ey/R9irXUf/4lz+HDAsd9Y3PbbcAiGSrFfF0afSsEM8DWH1vaPN b6fNVfVveSGF2i3TrSU1VMQD/oJRpaNRbX6VEtbP7wpV6JzqRC9TwKjYNIjuo7P17s/0 9/HO09TceF83zqh/FZRKiDyyGvf7KzikUf/SOzOpYZ3Rt6bX19vdujskIR9CZ5WM6GfF +OY4iQMAn9ay5FzrtAz0NQob5aJAMTYNOUuaokThVb9cIDVwpUYNjfSZkJsah9ddxiiG wDgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SQbVYCAxIVCp5MiQkA8Sk2jfRVFjWE9Bg9qCg8z4gCA=; b=P3ntEwfoYsOzEjEzaOy4CQi1hcYUKU6+9lmWGAFVrlqsD4DJxH6/6PX1g8LW8+wxaZ zlNB1kIq3rYLU2GoZVcPNRcEq4x60Az/LbeSX7BN5tjGWLfYXr8PIXJTtg3TyE5VjboA zcI+k1S9n20iP4fH/nBWYzOZ6XCtEIFufv4+ujV5Qw/jMrp7J2P0xcmRoWNbhBEPK00f fVb9DJY4IIvxgZCiae2fheAQWwA07p/DVPfRT8EvhEH13vos2FjZQZ602gKekKutcj5m vu4ipmoN+Xigt33pud913cVROvy5OHfCg6BVNLvVhojsYH56ednoiqI389EZZD5bgcRL FT2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=rJzTPQ9H; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u17si5687486ejk.29.2020.09.05.10.33.13; Sat, 05 Sep 2020 10:33:14 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=rJzTPQ9H; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726568AbgIERcd (ORCPT + 6 others); Sat, 5 Sep 2020 13:32:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:60182 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727875AbgIERc2 (ORCPT ); Sat, 5 Sep 2020 13:32:28 -0400 Received: from localhost.localdomain (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 076572086A; Sat, 5 Sep 2020 17:32:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599327147; bh=LEeUU+rrD5hpO7lkr4ZcwemfFSGeHmj8P3ohRK9wtLM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rJzTPQ9H4Eny+HO4mCvZEwnDo0ZwjmDf6nYmi68jLKpxGzTH8JId9F6NPoVbrZwRG LMKiEvTBj13Cpv7/m47acibbyzN5B+5Cgk8qLL1mt1dfrBKwTiGyTbIlmC6reSuR8X YTn5a7qHM9+l3IxuopA6cblzHhcgx6va+O7UcehI= From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Jonathan Cameron , Fugang Duan , Shawn Guo , Sascha Hauer Subject: [PATCH 01/20] dt-bindings:iio:adc:fsl, vf610-adc conversion to yaml. Date: Sat, 5 Sep 2020 18:29:45 +0100 Message-Id: <20200905173004.216081-2-jic23@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200905173004.216081-1-jic23@kernel.org> References: <20200905173004.216081-1-jic23@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron A simple conversion of this freescale ADC binding from txt to yaml. For maintainer I went with Fugang Duan as the original author of the binding. Would be great to have confirmation of this. Signed-off-by: Jonathan Cameron Cc: Fugang Duan Cc: Shawn Guo Cc: Sascha Hauer --- .../bindings/iio/adc/fsl,vf610-adc.yaml | 81 +++++++++++++++++++ .../devicetree/bindings/iio/adc/vf610-adc.txt | 36 --------- 2 files changed, 81 insertions(+), 36 deletions(-) -- 2.28.0 diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml new file mode 100644 index 000000000000..99b6b55fd0a3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC found on Freescale vf610 and similar SoCs + +maintainers: + - Fugang Duan + +description: + ADCs found on vf610/i.MX6slx and upward SoCs from Freescale. + +properties: + compatible: + const: fsl,vf610-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: ADC source clock (ipg clock) + maxItems: 1 + + clock-names: + const: adc + + vref-supply: + description: ADC reference voltage supply. + + fsl,adck-max-frequency: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + description: | + Maximum frequencies from datasheet operating requirements. + Three values necessary to cover the 3 conversion modes. + * Frequency in normal mode (ADLPC=0, ADHSC=0) + * Frequency in high-speed mode (ADLPC=0, ADHSC=1) + * Frequency in low-power mode (ADLPC=1, ADHSC=0) + + min-sample-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Minimum sampling time in nanoseconds. This value has + to be chosen according to the conversion mode and the connected analog + source resistance (R_as) and capacitance (C_as). Refer the datasheet's + operating requirements. A safe default across a wide range of R_as and + C_as as well as conversion modes is 1000ns. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + #include + adc@4003b000 { + compatible = "fsl,vf610-adc"; + reg = <0x4003b000 0x1000>; + interrupts = <0 53 0x04>; + clocks = <&clks VF610_CLK_ADC0>; + clock-names = "adc"; + fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>; + vref-supply = <®_vcc_3v3_mcu>; + min-sample-time = <10000>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt deleted file mode 100644 index 1aad0514e647..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt +++ /dev/null @@ -1,36 +0,0 @@ -Freescale vf610 Analog to Digital Converter bindings - -The devicetree bindings are for the new ADC driver written for -vf610/i.MX6slx and upward SoCs from Freescale. - -Required properties: -- compatible: Should contain "fsl,vf610-adc" -- reg: Offset and length of the register set for the device -- interrupts: Should contain the interrupt for the device -- clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock. -- clock-names: Must contain "adc", matching entry in the clocks property. -- vref-supply: The regulator supply ADC reference voltage. - -Recommended properties: -- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating - requirements. Three values are required, depending on conversion mode: - - Frequency in normal mode (ADLPC=0, ADHSC=0) - - Frequency in high-speed mode (ADLPC=0, ADHSC=1) - - Frequency in low-power mode (ADLPC=1, ADHSC=0) -- min-sample-time: Minimum sampling time in nanoseconds. This value has - to be chosen according to the conversion mode and the connected analog - source resistance (R_as) and capacitance (C_as). Refer the datasheet's - operating requirements. A safe default across a wide range of R_as and - C_as as well as conversion modes is 1000ns. - -Example: -adc0: adc@4003b000 { - compatible = "fsl,vf610-adc"; - reg = <0x4003b000 0x1000>; - interrupts = <0 53 0x04>; - clocks = <&clks VF610_CLK_ADC0>; - clock-names = "adc"; - fsl,adck-max-frequency = <30000000>, <40000000>, - <20000000>; - vref-supply = <®_vcc_3v3_mcu>; -};