From patchwork Wed Sep 9 17:59:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 249522 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ecf:0:0:0:0 with SMTP id i15csp54390ilk; Wed, 9 Sep 2020 11:02:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJygjkijkHO/1hlRLrNioUTLxEZjtOhwMwWBfehHL3t5fznxQ0wnWj039y+ylj7qNEfpQ3by X-Received: by 2002:a17:906:841a:: with SMTP id n26mr4735634ejx.213.1599674550725; Wed, 09 Sep 2020 11:02:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599674550; cv=none; d=google.com; s=arc-20160816; b=MGZUpLQxC6nWOc1w+a4PV2UUSdQgnFOv+6Q1fwO92WvSq6vz0uWzeTg/R7GhPnJDER rXNNp5T30pP3FO2uKTQRuoWpIbDq+AHmS6V8MGNfZmqejIMkyArsrdQ8qHuWxeNBl+24 y42uWXRBZFhPeseHrp+pEHLqNamzm9lGWeYJSteol7IvJU+9i7dVH4b8A4B/Dpt/rVzL mLAjkZLgvlu0fH2EOJyqT6j5JRlfC/veAbSIyVZ2meWkzpUFIz7C0xqviSAW5g5vZe9Y kSVj3x3Vm/Fv/zmWAUheUJvmjI/KdfGwSUDs2FrW5yqnksNoIhlYzxDAzMGzAlASy3Fa hZiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SQbVYCAxIVCp5MiQkA8Sk2jfRVFjWE9Bg9qCg8z4gCA=; b=GlXYb+obiVLAh/e0lMYsGPNWQsrxs0OO4x1r3+LO08U6OvPhci0JuTd0RdGcWf/Dr+ YPya38Ki6IQQxFc0guy5foE1tbsFn94hnnkuIJXO+1hW/hV1wyeW1KQ9imYNrIfr8FNE aZDCvYW0xZJ0yV9G9vtTkobtrlMl685wyF8VZE8dfMLbpl1/f6o3mBwZrKor/0yEmDB/ FIwhLv0uTLBsTiiASdhphvYHIM4TkchZdSiNDGtyPM1FLUhtPyW+mm5f87ZcpE8ESVoa gk80Tds3INj4fCT6VUWyQPd35WgG18c65j1trgnbnlNHdLPtoDVzjWLA/RvEbdqs7XQg cm8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=NesZeOcq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p9si1923789ejx.463.2020.09.09.11.02.30; Wed, 09 Sep 2020 11:02:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=NesZeOcq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730116AbgIISCZ (ORCPT + 6 others); Wed, 9 Sep 2020 14:02:25 -0400 Received: from mail.kernel.org ([198.145.29.99]:59138 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730083AbgIISCV (ORCPT ); Wed, 9 Sep 2020 14:02:21 -0400 Received: from localhost.localdomain (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5A29321D80; Wed, 9 Sep 2020 18:02:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599674540; bh=LEeUU+rrD5hpO7lkr4ZcwemfFSGeHmj8P3ohRK9wtLM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NesZeOcqEF8qei9KS3vzwIQft8h7WNsnmV6+I6ds8qDyuJq+OvwUwH5oK4g7RnV0Q IiA98YMSQztbyMCo8z6L4oqqflnA7Ysc887cKJL887exJ9NvWCumDtJnkM+H+capZm zCwJxxbOVxPwUzrg2m/rXemqflZU8obDxsHC/aXY= From: Jonathan Cameron To: linux-iio@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Jonathan Cameron , Fugang Duan , Shawn Guo , Sascha Hauer Subject: [PATCH v2 01/20] dt-bindings:iio:adc:fsl, vf610-adc conversion to yaml. Date: Wed, 9 Sep 2020 18:59:27 +0100 Message-Id: <20200909175946.395313-2-jic23@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200909175946.395313-1-jic23@kernel.org> References: <20200909175946.395313-1-jic23@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron A simple conversion of this freescale ADC binding from txt to yaml. For maintainer I went with Fugang Duan as the original author of the binding. Would be great to have confirmation of this. Signed-off-by: Jonathan Cameron Cc: Fugang Duan Cc: Shawn Guo Cc: Sascha Hauer --- .../bindings/iio/adc/fsl,vf610-adc.yaml | 81 +++++++++++++++++++ .../devicetree/bindings/iio/adc/vf610-adc.txt | 36 --------- 2 files changed, 81 insertions(+), 36 deletions(-) -- 2.28.0 Reviewed-by: Rob Herring Reviewed-by: Fugang Duan diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml new file mode 100644 index 000000000000..99b6b55fd0a3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC found on Freescale vf610 and similar SoCs + +maintainers: + - Fugang Duan + +description: + ADCs found on vf610/i.MX6slx and upward SoCs from Freescale. + +properties: + compatible: + const: fsl,vf610-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: ADC source clock (ipg clock) + maxItems: 1 + + clock-names: + const: adc + + vref-supply: + description: ADC reference voltage supply. + + fsl,adck-max-frequency: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + description: | + Maximum frequencies from datasheet operating requirements. + Three values necessary to cover the 3 conversion modes. + * Frequency in normal mode (ADLPC=0, ADHSC=0) + * Frequency in high-speed mode (ADLPC=0, ADHSC=1) + * Frequency in low-power mode (ADLPC=1, ADHSC=0) + + min-sample-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Minimum sampling time in nanoseconds. This value has + to be chosen according to the conversion mode and the connected analog + source resistance (R_as) and capacitance (C_as). Refer the datasheet's + operating requirements. A safe default across a wide range of R_as and + C_as as well as conversion modes is 1000ns. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + #include + adc@4003b000 { + compatible = "fsl,vf610-adc"; + reg = <0x4003b000 0x1000>; + interrupts = <0 53 0x04>; + clocks = <&clks VF610_CLK_ADC0>; + clock-names = "adc"; + fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>; + vref-supply = <®_vcc_3v3_mcu>; + min-sample-time = <10000>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt deleted file mode 100644 index 1aad0514e647..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt +++ /dev/null @@ -1,36 +0,0 @@ -Freescale vf610 Analog to Digital Converter bindings - -The devicetree bindings are for the new ADC driver written for -vf610/i.MX6slx and upward SoCs from Freescale. - -Required properties: -- compatible: Should contain "fsl,vf610-adc" -- reg: Offset and length of the register set for the device -- interrupts: Should contain the interrupt for the device -- clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock. -- clock-names: Must contain "adc", matching entry in the clocks property. -- vref-supply: The regulator supply ADC reference voltage. - -Recommended properties: -- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating - requirements. Three values are required, depending on conversion mode: - - Frequency in normal mode (ADLPC=0, ADHSC=0) - - Frequency in high-speed mode (ADLPC=0, ADHSC=1) - - Frequency in low-power mode (ADLPC=1, ADHSC=0) -- min-sample-time: Minimum sampling time in nanoseconds. This value has - to be chosen according to the conversion mode and the connected analog - source resistance (R_as) and capacitance (C_as). Refer the datasheet's - operating requirements. A safe default across a wide range of R_as and - C_as as well as conversion modes is 1000ns. - -Example: -adc0: adc@4003b000 { - compatible = "fsl,vf610-adc"; - reg = <0x4003b000 0x1000>; - interrupts = <0 53 0x04>; - clocks = <&clks VF610_CLK_ADC0>; - clock-names = "adc"; - fsl,adck-max-frequency = <30000000>, <40000000>, - <20000000>; - vref-supply = <®_vcc_3v3_mcu>; -};