From patchwork Mon Nov 2 10:11:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 314576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FE7DC4742C for ; Mon, 2 Nov 2020 10:13:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE888223BD for ; Mon, 2 Nov 2020 10:12:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="cmrqTADV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728471AbgKBKMf (ORCPT ); Mon, 2 Nov 2020 05:12:35 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38302 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728467AbgKBKMf (ORCPT ); Mon, 2 Nov 2020 05:12:35 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0A2ACSdC003121; Mon, 2 Nov 2020 04:12:28 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1604311948; bh=4EnqAmwlw82FiJ23Vk3WWXJCCIA3eH6H7JCGMc3LOoc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cmrqTADV+sQ+ClRKqSI+VwUNLlYqd0xOHqXb0SRfyKeXKlcEXfkJ3OzYOtycASgkD 4M4uRvaboxOtyzth++zkqw5Rt+j+fDmG/vTN52/BE0W8cmx9Y31zFfJMGT2KcuzsWb YO6QyHKR8WVSn1Htz9i0jCLo2SdzAc+tzmg2r1fU= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0A2ACSJ0067927 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 2 Nov 2020 04:12:28 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 2 Nov 2020 04:12:12 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 2 Nov 2020 04:12:12 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0A2ABtua059084; Mon, 2 Nov 2020 04:12:09 -0600 From: Kishon Vijay Abraham I To: Lee Jones , Rob Herring , Bjorn Helgaas , Tero Kristo , Nishanth Menon CC: Roger Quadros , , , , Subject: [PATCH 3/8] dt-bindings: PCI: Add EP mode dt-bindings for TI's J7200 SoC Date: Mon, 2 Nov 2020 15:41:49 +0530 Message-ID: <20201102101154.13598-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201102101154.13598-1-kishon@ti.com> References: <20201102101154.13598-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add PCIe EP mode dt-bindings for TI's J7200 SoC. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 3ae3e1a2d4b0..da8c5b892104 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -15,8 +15,14 @@ allOf: properties: compatible: - enum: - - ti,j721e-pcie-ep + oneOf: + - description: PCIe EP controller in J7200 + items: + - const: ti,j7200-pcie-ep + - const: ti,j721e-pcie-ep + - description: PCIe EP controller in J721E + items: + - const: ti,j721e-pcie-ep reg: maxItems: 4