From patchwork Sun Feb 14 17:44:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 382780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEA4BC433E0 for ; Sun, 14 Feb 2021 17:46:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C5B3A64DAD for ; Sun, 14 Feb 2021 17:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229881AbhBNRp5 (ORCPT ); Sun, 14 Feb 2021 12:45:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229730AbhBNRp5 (ORCPT ); Sun, 14 Feb 2021 12:45:57 -0500 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEF02C061756 for ; Sun, 14 Feb 2021 09:45:16 -0800 (PST) Received: by mail-pg1-x52a.google.com with SMTP id o7so2965702pgl.1 for ; Sun, 14 Feb 2021 09:45:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yf033zbvp9pxo0s9URPAho62aiEWTfxuw67OJFPXTEA=; b=PuAAqVaJh5jAn0NamzSuv82QYpI0zmuAO3SMkuF9aOwqyL6Cih2DxG+g1Y2DJpTaEL tqyAJP5/Ak0qUzw8zJNTcq/D8WIfDsniRgNVX1WjQFzh6XQ7JQF+GoYg1AiaIpFY1Ynh hYRwF20v658pXJihgJqyN5cRf9Yk2nVAqf+nI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yf033zbvp9pxo0s9URPAho62aiEWTfxuw67OJFPXTEA=; b=ugI2z6KP8qumFbXqJw2ZVJkCUzOuZRHff5rnaVKNDm7vMJfcoEBDjQ3AsU6vl6bFbF CoWQMM8VGf1dBZNVUgAwv6eleYG5IS6+YRd76EJlA9Fd4Zqay1x1hckeBmm9AfqeW+7g mAhKsKOsPzAF+viOKVcBrPHRZVWhtWWJx4LTXKCX6g0nPaBimgvzwQTBa5MsezuTiwSF ieNTgp5wY4c+aJ2da8EIPA7eUn7C1SoZgVWjxNxpOyBvzG8a7dXJ50YNUV+qf0GoKTQ5 mI+r+Djqd2QbtM9u2g6cmgQgj9g/6Dc6AZliqGUGCLweNMSGfKT09RVyPBUV5SEKnFKc pBHA== X-Gm-Message-State: AOAM533/WSua4H/mhDMEumStsY+a8Wm4FPn3zGKIattqNbMKHGeHxUjH Dct/dPpb6smyNZ5OZ2EBGDYRVw== X-Google-Smtp-Source: ABdhPJyHUQGyBnnPXCBvYOS14gWTLx7BW3BHq55wj63qQ+hemI+ja+3iq8ue8PjSgKlBfz5XBYFFWw== X-Received: by 2002:a62:644f:0:b029:1d3:b559:fe7a with SMTP id y76-20020a62644f0000b02901d3b559fe7amr11803213pfb.21.1613324716287; Sun, 14 Feb 2021 09:45:16 -0800 (PST) Received: from ub-XPS-13-9350.domain.name ([45.249.78.214]) by smtp.gmail.com with ESMTPSA id r205sm4794137pfr.128.2021.02.14.09.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Feb 2021 09:45:15 -0800 (PST) From: Jagan Teki To: Rob Herring , Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Sam Ravnborg Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki , Marek Vasut Subject: [PATCH v3 1/2] dt-bindings: display: bridge: Add bindings for SN65DSI83/84/85 Date: Sun, 14 Feb 2021 23:14:52 +0530 Message-Id: <20210214174453.104616-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SN65DSI83/84/85 devices are MIPI DSI to LVDS based bridge controller IC's from Texas Instruments. SN65DSI83 - Single Channel DSI to Single-link LVDS bridge SN65DSI84 - Single Channel DSI to Dual-link LVDS bridge SN65DSI85 - Dual Channel DSI to Dual-link LVDS bridge Right now the bridge driver is supporting Channel A with single link, so dt-bindings documented according to it. Cc: Marek Vasut Signed-off-by: Jagan Teki Reviewed-by: Rob Herring --- Changes for v3: - fixed Rob comments - updated commit message and file name to support all chip variants Changes for v2: - none .../bindings/display/bridge/ti,sn65dsi8x.yaml | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi8x.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi8x.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi8x.yaml new file mode 100644 index 000000000000..7f9f8cd6e786 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi8x.yaml @@ -0,0 +1,122 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi8x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI SN65DSI83/84/85 MIPI DSI to LVDS bridge bindings + +maintainers: + - Jagan Teki + +description: | + SN65DSI83/84/85 devices are MIPI DSI to LVDS based bridge controller + IC's from Texas Instruments. + + SN65DSI83 - Single Channel DSI to Single-link LVDS bridge + SN65DSI84 - Single Channel DSI to Dual-link LVDS bridge + SN65DSI85 - Dual Channel DSI to Dual-link LVDS bridge + + Bridge decodes MIPI DSI 18bpp RGB666 and 240bpp RG888 packets and + converts the formatted video data stream to a FlatLink compatible + LVDS output operating at pixel clocks operating from 25 MHx to + 154 MHz. + +properties: + compatible: + enum: + - ti,sn65dsi83 + - ti,sn65dsi84 + + reg: + const: 0x2c + + enable-gpios: + maxItems: 1 + description: GPIO specifier for bridge enable pin (active high). + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: | + DSI Input. The remote endpoint phandle should be a + reference to a valid mipi_dsi_host device node. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: | + Video port for LVDS output (panel or connector). + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - enable-gpios + - ports + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <<dc_ep0_out>; + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { + remote-endpoint = <&bridge_in>; + data-lanes = <0 1>; + }; + }; + }; + }; + + i2c6 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi84"; + reg = <0x2c>; + enable-gpios = <&gpiof 15 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + bridge_out: endpoint { + remote-endpoint = <&panel_in_lvds>; + }; + }; + }; + }; + };