From patchwork Sun Mar 21 20:40:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alain Volmat X-Patchwork-Id: 405929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF03C433E1 for ; Sun, 21 Mar 2021 20:51:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F293A61947 for ; Sun, 21 Mar 2021 20:51:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbhCUUue (ORCPT ); Sun, 21 Mar 2021 16:50:34 -0400 Received: from st43p00im-ztdg10073201.me.com ([17.58.63.177]:37979 "EHLO st43p00im-ztdg10073201.me.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230270AbhCUUuM (ORCPT ); Sun, 21 Mar 2021 16:50:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=me.com; s=1a1hai; t=1616359327; bh=Q2D+GfnSz9xlfYItrPsH8bhVvd92JdmC7OMWqbsn6Zw=; h=From:To:Subject:Date:Message-Id; b=dePHH4na4qgHQ+BAEyzERbzhvRLNiVO2IoJpDS3R7W20B/j2IdmLOFs14Fvhu8L2S hhrWG/hFRmw8/ubQI2dV44SU8l+QyEqB48csJNbKAUkmzgS+1m5LI6hmFTS7aAfvqg o1cHtxkr1gz55WpEF/NMaBs44Cb1z3ejgGHhx9KbC2HRCad8Mq+6nZf1gyNYQxcn37 A5hk0tQl6O5usGK9emb6Qf+SZx3BVhYqYyNBQpFf8r7ya3UtLmtiFz3zC4pUa8GXrc KfHuUDnizvAB/bA9qQwiLtpPmxduiorncfFT8CJDQA/eeIlacl4wnbPCVSslxO5YB8 PHBeDSrpb8ynA== Received: from localhost (101.220.150.77.rev.sfr.net [77.150.220.101]) by st43p00im-ztdg10073201.me.com (Postfix) with ESMTPSA id 7042522222F; Sun, 21 Mar 2021 20:42:06 +0000 (UTC) From: Alain Volmat To: Michael Turquette , Stephen Boyd , Rob Herring , Patrice Chotard Cc: Lee Jones , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alain Volmat Subject: [PATCH 13/16] ARM: dts: sti: update clkgen-pll entries in stih418-clock Date: Sun, 21 Mar 2021 21:40:35 +0100 Message-Id: <20210321204038.14417-14-avolmat@me.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210321204038.14417-1-avolmat@me.com> References: <20210321204038.14417-1-avolmat@me.com> X-Proofpoint-Virus-Version: =?utf-8?q?vendor=3Dfsecure_engine=3D1=2E1=2E1?= =?utf-8?q?70-22c6f66c430a71ce266a39bfe25bc2903e8d5c8f=3A6=2E0=2E36?= =?utf-8?b?OSwxOC4wLjc2MSwxNy4wLjYwNy40NzUuMDAwMDAwMCBkZWZpbml0aW9u?= =?utf-8?q?s=3D2021-03-21=5F02=3A2021-03-19=5F02=2C2021-03-21=5F02?= =?utf-8?q?=2C2020-04-07=5F01_signatures=3D0?= X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 clxscore=1015 adultscore=0 malwarescore=0 mlxscore=0 mlxlogscore=983 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103210166 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The clkgen-pll driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat --- arch/arm/boot/dts/stih418-clock.dtsi | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi index 35d12979cdf4..d628e656458d 100644 --- a/arch/arm/boot/dts/stih418-clock.dtsi +++ b/arch/arm/boot/dts/stih418-clock.dtsi @@ -39,8 +39,6 @@ compatible = "st,stih418-clkgen-plla9"; clocks = <&clk_sysin>; - - clock-output-names = "clockgen-a9-pll-odf"; }; }; @@ -75,11 +73,9 @@ clk_s_a0_pll: clk-s-a0-pll { #clock-cells = <1>; - compatible = "st,clkgen-pll0"; + compatible = "st,clkgen-pll0-a0"; clocks = <&clk_sysin>; - - clock-output-names = "clk-s-a0-pll-ofd-0"; }; clk_s_a0_flexgen: clk-s-a0-flexgen { @@ -111,20 +107,16 @@ clk_s_c0_pll0: clk-s-c0-pll0 { #clock-cells = <1>; - compatible = "st,clkgen-pll0"; + compatible = "st,clkgen-pll0-c0"; clocks = <&clk_sysin>; - - clock-output-names = "clk-s-c0-pll0-odf-0"; }; clk_s_c0_pll1: clk-s-c0-pll1 { #clock-cells = <1>; - compatible = "st,clkgen-pll1"; + compatible = "st,clkgen-pll1-c0"; clocks = <&clk_sysin>; - - clock-output-names = "clk-s-c0-pll1-odf-0"; }; clk_s_c0_flexgen: clk-s-c0-flexgen {