From patchwork Tue Apr 20 13:26:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 425429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9C93C43460 for ; Tue, 20 Apr 2021 13:26:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 85DE2610A1 for ; Tue, 20 Apr 2021 13:26:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232544AbhDTN1Q (ORCPT ); Tue, 20 Apr 2021 09:27:16 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:13776 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232524AbhDTN1N (ORCPT ); Tue, 20 Apr 2021 09:27:13 -0400 X-UUID: 959f53c016c34ab6838cafa57f8b35a2-20210420 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=x4PC10VWjynceWQKGlyruq1xHVfMHe0q+ks95eUDcMM=; b=h4Amvf4zV4EtMkX2uOL4XqdQaDatxwvRwb5ngk9VPSOOCnHO5ReevrLdvhAn5RpAgTGbB5wpolNxmbFt+WEr/9H2fsGIk2bu9IoBdpwuMGd208bbXNW7Etcr83p6wkRXEVwqERMWhDQH5gSKCjU6igqkGVGEemsietuXaU9M0dQ=; X-UUID: 959f53c016c34ab6838cafa57f8b35a2-20210420 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1691856229; Tue, 20 Apr 2021 21:26:37 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 20 Apr 2021 21:26:20 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (10.16.6.18) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 20 Apr 2021 21:26:18 +0800 From: Jitao Shi To: Rob Herring , Mark Rutland , Matthias Brugger , Daniel Vetter , David Airlie , , CC: , , , , , , , , , , , , Jitao Shi Subject: [PATCH 3/4] drm/mediatek: fine tune the dsi panel's power sequence Date: Tue, 20 Apr 2021 21:26:12 +0800 Message-ID: <20210420132614.150242-3-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210420132614.150242-1-jitao.shi@mediatek.com> References: <20210420132614.150242-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: DE26EABE28240C1980E352A0A7E176B5B54C70B4B01E7B5C108E2A0C6A821C082000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the drm_panel_prepare_power and drm_panel_unprepare_power control. Turn on panel power(drm_panel_prepare_power) and control before dsi enable. And then dsi enable, send dcs cmd in drm_panel_prepare, last turn on backlight. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index a1ff152ef468..455fe582c6b5 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -615,10 +615,13 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) dsi->data_rate = DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel, dsi->lanes); + if (panel_bridge_prepare_power(dsi->next_bridge)) + DRM_INFO("can't prepare power the panel\n"); + ret = clk_set_rate(dsi->hs_clk, dsi->data_rate); if (ret < 0) { dev_err(dev, "Failed to set data rate: %d\n", ret); - goto err_refcount; + goto err_prepare_power; } phy_power_on(dsi->phy); @@ -661,7 +664,9 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->engine_clk); err_phy_power_off: phy_power_off(dsi->phy); -err_refcount: +err_prepare_power: + if (panel_bridge_unprepare_power(dsi->next_bridge)) + DRM_INFO("Can't unprepare power the panel\n"); dsi->refcount--; return ret; } @@ -694,6 +699,9 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->digital_clk); phy_power_off(dsi->phy); + + if (panel_bridge_unprepare_power(dsi->next_bridge)) + DRM_INFO("Can't unprepare power the panel\n"); } static void mtk_output_dsi_enable(struct mtk_dsi *dsi)