diff mbox series

[v20,01/19] dt-binding: memory: pl353-smc: Rephrase the binding

Message ID 20210519182636.1110080-2-miquel.raynal@bootlin.com
State Superseded
Headers show
Series [v20,01/19] dt-binding: memory: pl353-smc: Rephrase the binding | expand

Commit Message

Miquel Raynal May 19, 2021, 6:26 p.m. UTC 
Reword this document before converting it to yaml.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../bindings/memory-controllers/pl353-smc.txt         | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

Comments

Rob Herring May 21, 2021, 1:51 a.m. UTC | #1 
On Wed, 19 May 2021 20:26:18 +0200, Miquel Raynal wrote:
> Reword this document before converting it to yaml.

> 

> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

> ---

>  .../bindings/memory-controllers/pl353-smc.txt         | 11 +++++------

>  1 file changed, 5 insertions(+), 6 deletions(-)

> 


Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
index d56615fd343a..f0b7fe173668 100644
--- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -1,8 +1,7 @@ 
 Device tree bindings for ARM PL353 static memory controller
 
-PL353 static memory controller supports two kinds of memory
-interfaces.i.e NAND and SRAM/NOR interfaces.
-The actual devices are instantiated from the child nodes of pl353 smc node.
+PL353 Static Memory Controller is a bus where you can connect two kinds
+of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
 
 Required properties:
 - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
@@ -13,9 +12,9 @@  Required properties:
 - address-cells		: Must be 2.
 - size-cells		: Must be 1.
 
-Child nodes:
- For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are
-supported as child nodes.
+The child device node represents the controller connected to the SMC
+bus. Only one between: NAND controller, NOR controller and SRAM controller
+is allowed in a single system.
 
 for NAND partition information please refer the below file
 Documentation/devicetree/bindings/mtd/partition.txt