Message ID | 20210610082040.2075611-4-miquel.raynal@bootlin.com |
---|---|
State | Accepted |
Commit | f1d19f7400132b45cab4ee60e974150699fe28b5 |
Headers | show |
Series | ARM Primecell PL35x support | expand |
diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt index 4210acf46a55..233b2fd8525b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt @@ -18,8 +18,6 @@ The child device node represents the controller connected to the SMC bus. Only one between: NAND controller, NOR controller and SRAM controller is allowed in a single system. -for NAND partition information please refer the below file -Documentation/devicetree/bindings/mtd/partition.txt Example: smcc: memory-controller@e000e000