From patchwork Thu Jun 17 09:43:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jamin Lin X-Patchwork-Id: 462365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 808D7C48BE5 for ; Thu, 17 Jun 2021 09:46:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D64C611BE for ; Thu, 17 Jun 2021 09:46:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231768AbhFQJsx (ORCPT ); Thu, 17 Jun 2021 05:48:53 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:42799 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231710AbhFQJsw (ORCPT ); Thu, 17 Jun 2021 05:48:52 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 15H9VHmn024645; Thu, 17 Jun 2021 17:31:17 +0800 (GMT-8) (envelope-from jamin_lin@aspeedtech.com) Received: from localhost.localdomain (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Jun 2021 17:45:39 +0800 From: Jamin Lin To: Rob Herring , Joel Stanley , "Andrew Jeffery" , Philipp Zabel , "Wolfram Sang" , Arnd Bergmann , "Jean Delvare" , Jarkko Nikula , Geert Uytterhoeven , Krzysztof Kozlowski , Khalil Blaiech , Yicong Yang , =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , Mike Rapoport , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , "Linus Walleij" , Andy Shevchenko , Ryan Chen , "open list:I2C SUBSYSTEM HOST DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list CC: , , Subject: [PATCH 2/3] dt-bindings: i2c-new: Add bindings for AST2600 I2C Date: Thu, 17 Jun 2021 17:43:39 +0800 Message-ID: <20210617094424.27123-3-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210617094424.27123-1-jamin_lin@aspeedtech.com> References: <20210617094424.27123-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 15H9VHmn024645 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AST2600 support the new register set of I2C controller Add bindings document to support the new driver of I2C Signed-off-by: Jamin Lin --- .../bindings/i2c/aspeed,new-i2c.yaml | 107 ++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/aspeed,new-i2c.yaml diff --git a/Documentation/devicetree/bindings/i2c/aspeed,new-i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,new-i2c.yaml new file mode 100644 index 000000000000..2c264596b138 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/aspeed,new-i2c.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/aspeed,new-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED I2C on the AST26XX SoCs Device Tree Bindings + +description: | + ASPEED I2C controller support the new register set since AST26XX + The i2c-global-regs device is used to enable new register set + +maintainers: + - Ryan Chen + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - aspeed,ast2600-i2c-bus + - items: + - enum: + - aspeed,ast2600-i2c-global + - const: syscon + + reg: + minItems: 1 + maxItems: 2 + items: + - description: address offset and range of bus + - description: address offset and range of bus buffer + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: + root clock of bus, should reference the APB + clock in the second cell + + resets: + maxItems: 1 + + bus-frequency: + minimum: 100 + maximum: 5000000 + default: 100000 + description: frequency of the bus clock in Hz defaults to 100 kHz when not + specified + + multi-master: + type: boolean + description: + states that there is another master active on this bus + + buff-mode: + type: boolean + description: + buffer mode data transfer + + byte-mode: + type: boolean + description: + byte mode tata transfer + + smbus-alert: + type: boolean + description: + smbus alert protocol + +required: + - reg + - compatible + - clocks + - resets + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + i2c_gr: i2c-global-regs@0 { + compatible = "aspeed,ast2600-i2c-global", "syscon"; + reg = <0x0 0x20>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I2C>; + }; + + i2c0: i2c-bus@80 { + compatible = "aspeed,ast2600-i2c-bus"; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x80 0x80>, <0xC00 0x20>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I2C>; + interrupts = ; + bus-frequency = <100000>; + };