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Fri, 18 Jun 2021 12:39:36 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Rob Herring Cc: Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [RFC PATCH v2 04/11] RISC-V: Allow marking IPIs as suitable for remote FENCEs Date: Fri, 18 Jun 2021 18:08:44 +0530 Message-Id: <20210618123851.1344518-5-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210618123851.1344518-1-anup.patel@wdc.com> References: <20210618123851.1344518-1-anup.patel@wdc.com> X-Originating-IP: [122.171.164.186] X-ClientProxiedBy: MA1PR0101CA0025.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:22::11) To CO6PR04MB7812.namprd04.prod.outlook.com (2603:10b6:303:138::6) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.171.164.186) by MA1PR0101CA0025.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:22::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.15 via Frontend Transport; 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The upcoming ACLINT [M|S]SWI devices and AIA IMSIC devices allow direct IPI injection from the RISC-V kernel. To support this, we extend the riscv_ipi_set_virq_range() function so that irqchip drivers can mark IPIs as suitable for remote FENCEs. Signed-off-by: Anup Patel --- arch/riscv/include/asm/smp.h | 18 ++++++++++++++++-- arch/riscv/kernel/sbi-ipi.c | 2 +- arch/riscv/kernel/smp.c | 9 ++++++++- 3 files changed, 25 insertions(+), 4 deletions(-) diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index 6bdaab122ffa..f4856c911335 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -16,6 +16,9 @@ struct seq_file; extern unsigned long boot_cpu_hartid; #ifdef CONFIG_SMP + +#include + /* * Mapping between linux logical cpu index and hartid. */ @@ -47,7 +50,12 @@ void riscv_ipi_disable(void); void riscv_ipi_setup(void); /* Set the IPI interrupt numbers for arch (called by irqchip drivers) */ -void riscv_ipi_set_virq_range(int virq, int nr_irqs); +void riscv_ipi_set_virq_range(int virq, int nr_irqs, bool use_for_rfence); + +/* Check if we can use IPIs for remote FENCEs */ +DECLARE_STATIC_KEY_FALSE(riscv_ipi_for_rfence); +#define riscv_use_ipi_for_rfence() \ + static_branch_unlikely(&riscv_ipi_for_rfence) /* Secondary hart entry */ asmlinkage void smp_callin(void); @@ -102,10 +110,16 @@ static inline void riscv_ipi_setup(void) { } -static inline void riscv_ipi_set_virq_range(int virq, int nr) +static inline void riscv_ipi_set_virq_range(int virq, int nr, + bool use_for_rfence) { } +static inline bool riscv_use_ipi_for_rfence(void) +{ + return false; +} + #endif /* CONFIG_SMP */ #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP) diff --git a/arch/riscv/kernel/sbi-ipi.c b/arch/riscv/kernel/sbi-ipi.c index 6cc0ea95e1af..0a06542d2b74 100644 --- a/arch/riscv/kernel/sbi-ipi.c +++ b/arch/riscv/kernel/sbi-ipi.c @@ -153,7 +153,7 @@ static int __init sbi_ipi_set_virq(void) return -ENOMEM; } - riscv_ipi_set_virq_range(virq, BITS_PER_LONG); + riscv_ipi_set_virq_range(virq, BITS_PER_LONG, false); return 0; } diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c index 26d563615f53..3905177b6748 100644 --- a/arch/riscv/kernel/smp.c +++ b/arch/riscv/kernel/smp.c @@ -178,7 +178,10 @@ void riscv_ipi_setup(void) riscv_ipi_enable(); } -void riscv_ipi_set_virq_range(int virq, int nr) +DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence); +EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence); + +void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence) { if (WARN_ON(ipi_virq_base)) return; @@ -186,6 +189,10 @@ void riscv_ipi_set_virq_range(int virq, int nr) WARN_ON(nr < IPI_MAX); nr_ipi = min(nr, IPI_MAX); ipi_virq_base = virq; + if (use_for_rfence) + static_branch_enable(&riscv_ipi_for_rfence); + else + static_branch_disable(&riscv_ipi_for_rfence); } EXPORT_SYMBOL_GPL(riscv_ipi_set_virq_range);