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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id m13sm6259264iob.35.2021.06.21.10.56.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Jun 2021 10:56:33 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: robh+dt@kernel.org, angelogioacchino.delregno@somainline.org, jamipkettunen@gmail.com, bjorn.andersson@linaro.org, agross@kernel.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/6] net: ipa: disable misc clock gating for IPA v3.1 Date: Mon, 21 Jun 2021 12:56:24 -0500 Message-Id: <20210621175627.238474-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210621175627.238474-1-elder@linaro.org> References: <20210621175627.238474-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For IPA v3.1, a workaround is needed to disable gating on a MISC clock. I have no further explanation, but this is what the downstream code (msm-4.4) does. This was suggested in a patch from AngeloGioacchino Del Regno. Link: https://lore.kernel.org/netdev/20210211175015.200772-2-angelogioacchino.delregno@somainline.org Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_main.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) -- 2.27.0 Acked-by: AngeloGioacchino Del Regno diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index f82130db32f6d..20a83c7f671f3 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -400,16 +400,20 @@ static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) /* Implement some hardware workarounds */ if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { - /* Enable open global clocks (not needed for IPA v4.5) */ - val = GLOBAL_FMASK; - val |= GLOBAL_2X_CLK_FMASK; - iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); - /* Disable PA mask to allow HOLB drop */ val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); val &= ~PA_MASK_EN_FMASK; iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); + + /* Enable open global clocks in the CLKON configuration */ + val = GLOBAL_FMASK | GLOBAL_2X_CLK_FMASK; + } else if (version == IPA_VERSION_3_1) { + val = MISC_FMASK; /* Disable MISC clock gating */ + } else { + val = 0; /* No CLKON configuration needed */ } + if (val) + iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); ipa_hardware_config_comp(ipa);