From patchwork Thu Jul 1 10:57:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 469631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ACB7C11F76 for ; Thu, 1 Jul 2021 10:57:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3EC166148E for ; Thu, 1 Jul 2021 10:57:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236252AbhGALAU (ORCPT ); Thu, 1 Jul 2021 07:00:20 -0400 Received: from relay07.th.seeweb.it ([5.144.164.168]:57017 "EHLO relay07.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236220AbhGALAO (ORCPT ); Thu, 1 Jul 2021 07:00:14 -0400 Received: from IcarusMOD.eternityproject.eu (unknown [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 4EF973F646; Thu, 1 Jul 2021 12:57:40 +0200 (CEST) From: AngeloGioacchino Del Regno To: bjorn.andersson@linaro.org Cc: viresh.kumar@linaro.org, agross@kernel.org, rjw@rjwysocki.net, devicetree@vger.kernel.org, robh+dt@kernel.org, amit.kucheria@linaro.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, jami.kettunen@somainline.org, paul.bouchara@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, jeffrey.l.hugo@gmail.com, AngeloGioacchino Del Regno Subject: [PATCH v6 9/9] dt-bindings: cpufreq: qcom-hw: Make reg-names a required property Date: Thu, 1 Jul 2021 12:57:30 +0200 Message-Id: <20210701105730.322718-10-angelogioacchino.delregno@somainline.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210701105730.322718-1-angelogioacchino.delregno@somainline.org> References: <20210701105730.322718-1-angelogioacchino.delregno@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The property reg-names is required after the addition of the OSM programming sequence, as that mandates specifying different register domains; to avoid confusion and improve devicetree readability, specifying the regions names was made mandatory. --- Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index 29b663321a0b..17fd6a6cefb0 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -98,6 +98,7 @@ else: required: - compatible - reg + - reg-names - clocks - clock-names - '#freq-domain-cells'